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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/sound/soc/mediatek/mt8188/mt8188-dai-adda.c
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1
// SPDX-License-Identifier: GPL-2.0
2
/*
3
* MediaTek ALSA SoC Audio DAI ADDA Control
4
*
5
* Copyright (c) 2022 MediaTek Inc.
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* Author: Bicycle Tsai <[email protected]>
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* Trevor Wu <[email protected]>
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* Chun-Chia Chiu <[email protected]>
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*/
10
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#include <linux/bitfield.h>
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#include <linux/delay.h>
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#include <linux/regmap.h>
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#include "mt8188-afe-clk.h"
15
#include "mt8188-afe-common.h"
16
#include "mt8188-reg.h"
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#include "../common/mtk-dai-adda-common.h"
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19
#define ADDA_HIRES_THRES 48000
20
21
enum {
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SUPPLY_SEQ_ADDA_DL_ON,
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SUPPLY_SEQ_ADDA_MTKAIF_CFG,
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SUPPLY_SEQ_ADDA_UL_ON,
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SUPPLY_SEQ_ADDA_AFE_ON,
26
};
27
28
struct mtk_dai_adda_priv {
29
bool hires_required;
30
};
31
32
static int mt8188_adda_mtkaif_init(struct mtk_base_afe *afe)
33
{
34
struct mt8188_afe_private *afe_priv = afe->platform_priv;
35
struct mtkaif_param *param = &afe_priv->mtkaif_params;
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int delay_data;
37
int delay_cycle;
38
unsigned int mask = 0;
39
unsigned int val = 0;
40
41
/* set rx protocol 2 & mtkaif_rxif_clkinv_adc inverse */
42
regmap_set_bits(afe->regmap, AFE_ADDA_MTKAIF_CFG0,
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MTKAIF_RXIF_CLKINV_ADC | MTKAIF_RXIF_PROTOCOL2);
44
45
regmap_set_bits(afe->regmap, AFE_AUD_PAD_TOP, RG_RX_PROTOCOL2);
46
47
if (!param->mtkaif_calibration_ok) {
48
dev_info(afe->dev, "%s(), calibration fail\n", __func__);
49
return 0;
50
}
51
52
/* set delay for ch1, ch2 */
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if (param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_0] >=
54
param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_1]) {
55
delay_data = DELAY_DATA_MISO1;
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delay_cycle =
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param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_0] -
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param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_1];
59
} else {
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delay_data = DELAY_DATA_MISO0;
61
delay_cycle =
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param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_1] -
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param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_0];
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}
65
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mask = (MTKAIF_RXIF_DELAY_DATA | MTKAIF_RXIF_DELAY_CYCLE_MASK);
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val |= FIELD_PREP(MTKAIF_RXIF_DELAY_CYCLE_MASK, delay_cycle);
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val |= FIELD_PREP(MTKAIF_RXIF_DELAY_DATA, delay_data);
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regmap_update_bits(afe->regmap, AFE_ADDA_MTKAIF_RX_CFG2, mask, val);
70
71
return 0;
72
}
73
74
static int mtk_adda_mtkaif_cfg_event(struct snd_soc_dapm_widget *w,
75
struct snd_kcontrol *kcontrol,
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int event)
77
{
78
struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
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struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
80
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dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
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__func__, w->name, event);
83
84
switch (event) {
85
case SND_SOC_DAPM_PRE_PMU:
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mt8188_adda_mtkaif_init(afe);
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break;
88
default:
89
break;
90
}
91
92
return 0;
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}
94
95
static int mtk_adda_dl_event(struct snd_soc_dapm_widget *w,
96
struct snd_kcontrol *kcontrol,
97
int event)
98
{
99
struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
100
struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
101
102
dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
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__func__, w->name, event);
104
105
switch (event) {
106
case SND_SOC_DAPM_POST_PMD:
107
/* should delayed 1/fs(smallest is 8k) = 125us before afe off */
108
usleep_range(125, 135);
109
break;
110
default:
111
break;
112
}
113
114
return 0;
115
}
116
117
static void mtk_adda_ul_mictype(struct mtk_base_afe *afe, bool dmic)
118
{
119
unsigned int reg = AFE_ADDA_UL_SRC_CON0;
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unsigned int val;
121
122
val = (UL_SDM3_LEVEL_CTL | UL_MODE_3P25M_CH1_CTL |
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UL_MODE_3P25M_CH2_CTL);
124
125
/* turn on dmic, ch1, ch2 */
126
if (dmic)
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regmap_set_bits(afe->regmap, reg, val);
128
else
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regmap_clear_bits(afe->regmap, reg, val);
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}
131
132
static int mtk_adda_ul_event(struct snd_soc_dapm_widget *w,
133
struct snd_kcontrol *kcontrol,
134
int event)
135
{
136
struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
137
struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
138
struct mt8188_afe_private *afe_priv = afe->platform_priv;
139
struct mtkaif_param *param = &afe_priv->mtkaif_params;
140
141
dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
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__func__, w->name, event);
143
144
switch (event) {
145
case SND_SOC_DAPM_PRE_PMU:
146
mtk_adda_ul_mictype(afe, param->mtkaif_dmic_on);
147
break;
148
case SND_SOC_DAPM_POST_PMD:
149
/* should delayed 1/fs(smallest is 8k) = 125us before afe off */
150
usleep_range(125, 135);
151
break;
152
default:
153
break;
154
}
155
156
return 0;
157
}
158
159
static struct mtk_dai_adda_priv *get_adda_priv_by_name(struct mtk_base_afe *afe,
160
const char *name)
161
{
162
struct mt8188_afe_private *afe_priv = afe->platform_priv;
163
164
if (strstr(name, "aud_adc_hires"))
165
return afe_priv->dai_priv[MT8188_AFE_IO_UL_SRC];
166
else if (strstr(name, "aud_dac_hires"))
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return afe_priv->dai_priv[MT8188_AFE_IO_DL_SRC];
168
else
169
return NULL;
170
}
171
172
static int mtk_afe_adda_hires_connect(struct snd_soc_dapm_widget *source,
173
struct snd_soc_dapm_widget *sink)
174
{
175
struct snd_soc_dapm_widget *w = source;
176
struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
177
struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
178
struct mtk_dai_adda_priv *adda_priv;
179
180
adda_priv = get_adda_priv_by_name(afe, w->name);
181
182
if (!adda_priv) {
183
dev_dbg(afe->dev, "adda_priv == NULL");
184
return 0;
185
}
186
187
return (adda_priv->hires_required) ? 1 : 0;
188
}
189
190
static const struct snd_kcontrol_new mtk_dai_adda_o176_mix[] = {
191
SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN176, 0, 1, 0),
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SOC_DAPM_SINGLE_AUTODISABLE("I002 Switch", AFE_CONN176, 2, 1, 0),
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SOC_DAPM_SINGLE_AUTODISABLE("I020 Switch", AFE_CONN176, 20, 1, 0),
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SOC_DAPM_SINGLE_AUTODISABLE("I022 Switch", AFE_CONN176, 22, 1, 0),
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SOC_DAPM_SINGLE_AUTODISABLE("I070 Switch", AFE_CONN176_2, 6, 1, 0),
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};
197
198
static const struct snd_kcontrol_new mtk_dai_adda_o177_mix[] = {
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SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN177, 1, 1, 0),
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SOC_DAPM_SINGLE_AUTODISABLE("I003 Switch", AFE_CONN177, 3, 1, 0),
201
SOC_DAPM_SINGLE_AUTODISABLE("I021 Switch", AFE_CONN177, 21, 1, 0),
202
SOC_DAPM_SINGLE_AUTODISABLE("I023 Switch", AFE_CONN177, 23, 1, 0),
203
SOC_DAPM_SINGLE_AUTODISABLE("I071 Switch", AFE_CONN177_2, 7, 1, 0),
204
};
205
206
static const char * const adda_dlgain_mux_map[] = {
207
"Bypass", "Connect",
208
};
209
210
static SOC_ENUM_SINGLE_DECL(adda_dlgain_mux_map_enum,
211
SND_SOC_NOPM, 0,
212
adda_dlgain_mux_map);
213
214
static const struct snd_kcontrol_new adda_dlgain_mux_control =
215
SOC_DAPM_ENUM("DL_GAIN_MUX", adda_dlgain_mux_map_enum);
216
217
static const struct snd_soc_dapm_widget mtk_dai_adda_widgets[] = {
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SND_SOC_DAPM_MIXER("I168", SND_SOC_NOPM, 0, 0, NULL, 0),
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SND_SOC_DAPM_MIXER("I169", SND_SOC_NOPM, 0, 0, NULL, 0),
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221
SND_SOC_DAPM_MIXER("O176", SND_SOC_NOPM, 0, 0,
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mtk_dai_adda_o176_mix,
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ARRAY_SIZE(mtk_dai_adda_o176_mix)),
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SND_SOC_DAPM_MIXER("O177", SND_SOC_NOPM, 0, 0,
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mtk_dai_adda_o177_mix,
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ARRAY_SIZE(mtk_dai_adda_o177_mix)),
227
228
SND_SOC_DAPM_SUPPLY_S("ADDA Enable", SUPPLY_SEQ_ADDA_AFE_ON,
229
AFE_ADDA_UL_DL_CON0,
230
ADDA_AFE_ON_SHIFT, 0,
231
NULL,
232
0),
233
234
SND_SOC_DAPM_SUPPLY_S("ADDA Playback Enable", SUPPLY_SEQ_ADDA_DL_ON,
235
AFE_ADDA_DL_SRC2_CON0,
236
DL_2_SRC_ON_TMP_CTRL_PRE_SHIFT, 0,
237
mtk_adda_dl_event,
238
SND_SOC_DAPM_POST_PMD),
239
240
SND_SOC_DAPM_SUPPLY_S("ADDA Capture Enable", SUPPLY_SEQ_ADDA_UL_ON,
241
AFE_ADDA_UL_SRC_CON0,
242
UL_SRC_ON_TMP_CTL_SHIFT, 0,
243
mtk_adda_ul_event,
244
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
245
246
SND_SOC_DAPM_SUPPLY_S("ADDA_MTKAIF_CFG", SUPPLY_SEQ_ADDA_MTKAIF_CFG,
247
SND_SOC_NOPM,
248
0, 0,
249
mtk_adda_mtkaif_cfg_event,
250
SND_SOC_DAPM_PRE_PMU),
251
252
SND_SOC_DAPM_MUX("DL_GAIN_MUX", SND_SOC_NOPM, 0, 0,
253
&adda_dlgain_mux_control),
254
255
SND_SOC_DAPM_PGA("DL_GAIN", AFE_ADDA_DL_SRC2_CON0,
256
DL_2_GAIN_ON_CTL_PRE_SHIFT, 0, NULL, 0),
257
258
SND_SOC_DAPM_INPUT("ADDA_INPUT"),
259
SND_SOC_DAPM_OUTPUT("ADDA_OUTPUT"),
260
261
SND_SOC_DAPM_CLOCK_SUPPLY("aud_dac"),
262
SND_SOC_DAPM_CLOCK_SUPPLY("aud_adc"),
263
SND_SOC_DAPM_CLOCK_SUPPLY("aud_dac_hires"),
264
SND_SOC_DAPM_CLOCK_SUPPLY("aud_adc_hires"),
265
};
266
267
static const struct snd_soc_dapm_route mtk_dai_adda_routes[] = {
268
{"ADDA Capture", NULL, "ADDA Enable"},
269
{"ADDA Capture", NULL, "ADDA Capture Enable"},
270
{"ADDA Capture", NULL, "ADDA_MTKAIF_CFG"},
271
{"ADDA Capture", NULL, "aud_adc"},
272
{"ADDA Capture", NULL, "aud_adc_hires", mtk_afe_adda_hires_connect},
273
274
{"I168", NULL, "ADDA Capture"},
275
{"I169", NULL, "ADDA Capture"},
276
277
{"ADDA Playback", NULL, "ADDA Enable"},
278
{"ADDA Playback", NULL, "ADDA Playback Enable"},
279
{"ADDA Playback", NULL, "aud_dac"},
280
{"ADDA Playback", NULL, "aud_dac_hires", mtk_afe_adda_hires_connect},
281
282
{"DL_GAIN", NULL, "O176"},
283
{"DL_GAIN", NULL, "O177"},
284
285
{"DL_GAIN_MUX", "Bypass", "O176"},
286
{"DL_GAIN_MUX", "Bypass", "O177"},
287
{"DL_GAIN_MUX", "Connect", "DL_GAIN"},
288
289
{"ADDA Playback", NULL, "DL_GAIN_MUX"},
290
291
{"O176", "I000 Switch", "I000"},
292
{"O177", "I001 Switch", "I001"},
293
294
{"O176", "I002 Switch", "I002"},
295
{"O177", "I003 Switch", "I003"},
296
297
{"O176", "I020 Switch", "I020"},
298
{"O177", "I021 Switch", "I021"},
299
300
{"O176", "I022 Switch", "I022"},
301
{"O177", "I023 Switch", "I023"},
302
303
{"O176", "I070 Switch", "I070"},
304
{"O177", "I071 Switch", "I071"},
305
306
{"ADDA Capture", NULL, "ADDA_INPUT"},
307
{"ADDA_OUTPUT", NULL, "ADDA Playback"},
308
};
309
310
static int mt8188_adda_dmic_get(struct snd_kcontrol *kcontrol,
311
struct snd_ctl_elem_value *ucontrol)
312
{
313
struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
314
struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
315
struct mt8188_afe_private *afe_priv = afe->platform_priv;
316
struct mtkaif_param *param = &afe_priv->mtkaif_params;
317
318
ucontrol->value.integer.value[0] = param->mtkaif_dmic_on;
319
return 0;
320
}
321
322
static int mt8188_adda_dmic_set(struct snd_kcontrol *kcontrol,
323
struct snd_ctl_elem_value *ucontrol)
324
{
325
struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
326
struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
327
struct mt8188_afe_private *afe_priv = afe->platform_priv;
328
struct mtkaif_param *param = &afe_priv->mtkaif_params;
329
int dmic_on;
330
331
dmic_on = !!ucontrol->value.integer.value[0];
332
333
dev_dbg(afe->dev, "%s(), kcontrol name %s, dmic_on %d\n",
334
__func__, kcontrol->id.name, dmic_on);
335
336
if (param->mtkaif_dmic_on == dmic_on)
337
return 0;
338
339
param->mtkaif_dmic_on = dmic_on;
340
return 1;
341
}
342
343
static const struct snd_kcontrol_new mtk_dai_adda_controls[] = {
344
SOC_SINGLE("ADDA_DL_GAIN", AFE_ADDA_DL_SRC2_CON1,
345
DL_2_GAIN_CTL_PRE_SHIFT, 65535, 0),
346
SOC_SINGLE_BOOL_EXT("MTKAIF_DMIC Switch", 0,
347
mt8188_adda_dmic_get, mt8188_adda_dmic_set),
348
};
349
350
static int mtk_dai_da_configure(struct mtk_base_afe *afe,
351
unsigned int rate, int id)
352
{
353
unsigned int val = 0;
354
unsigned int mask = 0;
355
356
/* set sampling rate */
357
mask |= DL_2_INPUT_MODE_CTL_MASK;
358
val |= FIELD_PREP(DL_2_INPUT_MODE_CTL_MASK,
359
mtk_adda_dl_rate_transform(afe, rate));
360
361
/* turn off saturation */
362
mask |= DL_2_CH1_SATURATION_EN_CTL;
363
mask |= DL_2_CH2_SATURATION_EN_CTL;
364
365
/* turn off mute function */
366
mask |= DL_2_MUTE_CH1_OFF_CTL_PRE;
367
mask |= DL_2_MUTE_CH2_OFF_CTL_PRE;
368
val |= DL_2_MUTE_CH1_OFF_CTL_PRE;
369
val |= DL_2_MUTE_CH2_OFF_CTL_PRE;
370
371
/* set voice input data if input sample rate is 8k or 16k */
372
mask |= DL_2_VOICE_MODE_CTL_PRE;
373
if (rate == 8000 || rate == 16000)
374
val |= DL_2_VOICE_MODE_CTL_PRE;
375
376
regmap_update_bits(afe->regmap, AFE_ADDA_DL_SRC2_CON0, mask, val);
377
378
/* new 2nd sdm */
379
regmap_set_bits(afe->regmap, AFE_ADDA_DL_SDM_DCCOMP_CON,
380
DL_USE_NEW_2ND_SDM);
381
382
return 0;
383
}
384
385
static int mtk_dai_ad_configure(struct mtk_base_afe *afe,
386
unsigned int rate, int id)
387
{
388
unsigned int val;
389
unsigned int mask;
390
391
mask = UL_VOICE_MODE_CTL_MASK;
392
val = FIELD_PREP(UL_VOICE_MODE_CTL_MASK,
393
mtk_adda_ul_rate_transform(afe, rate));
394
395
regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0,
396
mask, val);
397
return 0;
398
}
399
400
static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream,
401
struct snd_pcm_hw_params *params,
402
struct snd_soc_dai *dai)
403
{
404
struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
405
struct mt8188_afe_private *afe_priv = afe->platform_priv;
406
struct mtk_dai_adda_priv *adda_priv = afe_priv->dai_priv[dai->id];
407
unsigned int rate = params_rate(params);
408
int id = dai->id;
409
int ret = 0;
410
411
dev_dbg(afe->dev, "%s(), id %d, stream %d, rate %u\n",
412
__func__, id, substream->stream, rate);
413
414
adda_priv->hires_required = (rate > ADDA_HIRES_THRES);
415
416
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
417
ret = mtk_dai_da_configure(afe, rate, id);
418
else
419
ret = mtk_dai_ad_configure(afe, rate, id);
420
421
return ret;
422
}
423
424
static const struct snd_soc_dai_ops mtk_dai_adda_ops = {
425
.hw_params = mtk_dai_adda_hw_params,
426
};
427
428
/* dai driver */
429
#define MTK_ADDA_PLAYBACK_RATES (SNDRV_PCM_RATE_8000_48000 |\
430
SNDRV_PCM_RATE_96000 |\
431
SNDRV_PCM_RATE_192000)
432
433
#define MTK_ADDA_CAPTURE_RATES (SNDRV_PCM_RATE_8000 |\
434
SNDRV_PCM_RATE_16000 |\
435
SNDRV_PCM_RATE_32000 |\
436
SNDRV_PCM_RATE_48000 |\
437
SNDRV_PCM_RATE_96000 |\
438
SNDRV_PCM_RATE_192000)
439
440
#define MTK_ADDA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
441
SNDRV_PCM_FMTBIT_S24_LE |\
442
SNDRV_PCM_FMTBIT_S32_LE)
443
444
static struct snd_soc_dai_driver mtk_dai_adda_driver[] = {
445
{
446
.name = "DL_SRC",
447
.id = MT8188_AFE_IO_DL_SRC,
448
.playback = {
449
.stream_name = "ADDA Playback",
450
.channels_min = 1,
451
.channels_max = 2,
452
.rates = MTK_ADDA_PLAYBACK_RATES,
453
.formats = MTK_ADDA_FORMATS,
454
},
455
.ops = &mtk_dai_adda_ops,
456
},
457
{
458
.name = "UL_SRC",
459
.id = MT8188_AFE_IO_UL_SRC,
460
.capture = {
461
.stream_name = "ADDA Capture",
462
.channels_min = 1,
463
.channels_max = 2,
464
.rates = MTK_ADDA_CAPTURE_RATES,
465
.formats = MTK_ADDA_FORMATS,
466
},
467
.ops = &mtk_dai_adda_ops,
468
},
469
};
470
471
static int init_adda_priv_data(struct mtk_base_afe *afe)
472
{
473
struct mt8188_afe_private *afe_priv = afe->platform_priv;
474
struct mtk_dai_adda_priv *adda_priv;
475
int adda_dai_list[] = {MT8188_AFE_IO_DL_SRC, MT8188_AFE_IO_UL_SRC};
476
int i;
477
478
for (i = 0; i < ARRAY_SIZE(adda_dai_list); i++) {
479
adda_priv = devm_kzalloc(afe->dev,
480
sizeof(struct mtk_dai_adda_priv),
481
GFP_KERNEL);
482
if (!adda_priv)
483
return -ENOMEM;
484
485
afe_priv->dai_priv[adda_dai_list[i]] = adda_priv;
486
}
487
488
return 0;
489
}
490
491
int mt8188_dai_adda_register(struct mtk_base_afe *afe)
492
{
493
struct mtk_base_afe_dai *dai;
494
495
dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
496
if (!dai)
497
return -ENOMEM;
498
499
list_add(&dai->list, &afe->sub_dais);
500
501
dai->dai_drivers = mtk_dai_adda_driver;
502
dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_adda_driver);
503
504
dai->dapm_widgets = mtk_dai_adda_widgets;
505
dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_adda_widgets);
506
dai->dapm_routes = mtk_dai_adda_routes;
507
dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_adda_routes);
508
dai->controls = mtk_dai_adda_controls;
509
dai->num_controls = ARRAY_SIZE(mtk_dai_adda_controls);
510
511
return init_adda_priv_data(afe);
512
}
513
514