Path: blob/master/sound/soc/mediatek/mt8189/mt8189-afe-common.h
38245 views
/* SPDX-License-Identifier: GPL-2.0 */1/*2* mt8189-afe-common.h -- Mediatek 8189 audio driver definitions3*4* Copyright (c) 2025 MediaTek Inc.5* Author: Darren Ye <[email protected]>6*/78#ifndef _MT_8189_AFE_COMMON_H_9#define _MT_8189_AFE_COMMON_H_1011#include <linux/regmap.h>1213#include <sound/soc.h>1415#include "mt8189-reg.h"16#include "../common/mtk-base-afe.h"1718enum {19MTK_AFE_RATE_8K,20MTK_AFE_RATE_11K,21MTK_AFE_RATE_12K,22MTK_AFE_RATE_384K,23MTK_AFE_RATE_16K,24MTK_AFE_RATE_22K,25MTK_AFE_RATE_24K,26MTK_AFE_RATE_352K,27MTK_AFE_RATE_32K,28MTK_AFE_RATE_44K,29MTK_AFE_RATE_48K,30MTK_AFE_RATE_88K,31MTK_AFE_RATE_96K,32MTK_AFE_RATE_176K,33MTK_AFE_RATE_192K,34MTK_AFE_RATE_260K,35};3637/* HW IPM 2.0 */38enum {39MTK_AFE_IPM2P0_RATE_8K = 0x0,40MTK_AFE_IPM2P0_RATE_11K = 0x1,41MTK_AFE_IPM2P0_RATE_12K = 0x2,42MTK_AFE_IPM2P0_RATE_16K = 0x4,43MTK_AFE_IPM2P0_RATE_22K = 0x5,44MTK_AFE_IPM2P0_RATE_24K = 0x6,45MTK_AFE_IPM2P0_RATE_32K = 0x8,46MTK_AFE_IPM2P0_RATE_44K = 0x9,47MTK_AFE_IPM2P0_RATE_48K = 0xa,48MTK_AFE_IPM2P0_RATE_88K = 0xd,49MTK_AFE_IPM2P0_RATE_96K = 0xe,50MTK_AFE_IPM2P0_RATE_176K = 0x11,51MTK_AFE_IPM2P0_RATE_192K = 0x12,52MTK_AFE_IPM2P0_RATE_352K = 0x15,53MTK_AFE_IPM2P0_RATE_384K = 0x16,54};5556enum {57MTK_AFE_DAI_MEMIF_RATE_8K,58MTK_AFE_DAI_MEMIF_RATE_16K,59MTK_AFE_DAI_MEMIF_RATE_32K,60MTK_AFE_DAI_MEMIF_RATE_48K,61};6263enum {64MTK_AFE_PCM_RATE_8K,65MTK_AFE_PCM_RATE_16K,66MTK_AFE_PCM_RATE_32K,67MTK_AFE_PCM_RATE_48K,68};6970enum {71MTKAIF_PROTOCOL_1,72MTKAIF_PROTOCOL_2,73MTKAIF_PROTOCOL_2_CLK_P2,74};7576enum {77MT8189_MEMIF_DL0,78MT8189_MEMIF_DL1,79MT8189_MEMIF_DL2,80MT8189_MEMIF_DL3,81MT8189_MEMIF_DL4,82MT8189_MEMIF_DL5,83MT8189_MEMIF_DL6,84MT8189_MEMIF_DL7,85MT8189_MEMIF_DL8,86MT8189_MEMIF_DL23,87MT8189_MEMIF_DL24,88MT8189_MEMIF_DL25,89MT8189_MEMIF_DL_24CH,90MT8189_MEMIF_VUL0,91MT8189_MEMIF_VUL1,92MT8189_MEMIF_VUL2,93MT8189_MEMIF_VUL3,94MT8189_MEMIF_VUL4,95MT8189_MEMIF_VUL5,96MT8189_MEMIF_VUL6,97MT8189_MEMIF_VUL7,98MT8189_MEMIF_VUL8,99MT8189_MEMIF_VUL9,100MT8189_MEMIF_VUL10,101MT8189_MEMIF_VUL24,102MT8189_MEMIF_VUL25,103MT8189_MEMIF_VUL_CM0,104MT8189_MEMIF_VUL_CM1,105MT8189_MEMIF_ETDM_IN0,106MT8189_MEMIF_ETDM_IN1,107MT8189_MEMIF_HDMI,108MT8189_MEMIF_NUM,109MT8189_DAI_ADDA = MT8189_MEMIF_NUM,110MT8189_DAI_ADDA_CH34,111MT8189_DAI_ADDA_CH56,112MT8189_DAI_AP_DMIC,113MT8189_DAI_AP_DMIC_CH34,114MT8189_DAI_I2S_IN0,115MT8189_DAI_I2S_IN1,116MT8189_DAI_I2S_OUT0,117MT8189_DAI_I2S_OUT1,118MT8189_DAI_I2S_OUT4,119MT8189_DAI_PCM_0,120MT8189_DAI_TDM,121MT8189_DAI_TDM_DPTX,122MT8189_DAI_NUM,123};124125/* update irq ID (= enum) from AFE_IRQ_MCU_STATUS */126enum {127MT8189_IRQ_0,128MT8189_IRQ_1,129MT8189_IRQ_2,130MT8189_IRQ_3,131MT8189_IRQ_4,132MT8189_IRQ_5,133MT8189_IRQ_6,134MT8189_IRQ_7,135MT8189_IRQ_8,136MT8189_IRQ_9,137MT8189_IRQ_10,138MT8189_IRQ_11,139MT8189_IRQ_12,140MT8189_IRQ_13,141MT8189_IRQ_14,142MT8189_IRQ_15,143MT8189_IRQ_16,144MT8189_IRQ_17,145MT8189_IRQ_18,146MT8189_IRQ_19,147MT8189_IRQ_20,148MT8189_IRQ_21,149MT8189_IRQ_22,150MT8189_IRQ_23,151MT8189_IRQ_24,152MT8189_IRQ_25,153MT8189_IRQ_26,154MT8189_IRQ_31,155MT8189_IRQ_NUM,156};157158/* update irq ID (= enum) from AFE_IRQ_MCU_STATUS */159enum {160MT8189_CUS_IRQ_TDM, /* used only for TDM */161MT8189_CUS_IRQ_NUM,162};163164enum {165/* AUDIO_ENGEN_CON0 */166MT8189_AUDIO_26M_EN_ON,167MT8189_AUDIO_F3P25M_EN_ON,168MT8189_AUDIO_APLL1_EN_ON,169MT8189_AUDIO_APLL2_EN_ON,170MT8189_AUDIO_F26M_EN_RST,171MT8189_MULTI_USER_RST,172MT8189_MULTI_USER_BYPASS,173/* AUDIO_TOP_CON4 */174MT8189_CG_AUDIO_HOPPING_CK,175MT8189_CG_AUDIO_F26M_CK,176MT8189_CG_APLL1_CK,177MT8189_CG_APLL2_CK,178MT8189_PDN_APLL_TUNER2,179MT8189_PDN_APLL_TUNER1,180MT8189_AUDIO_CG_NUM,181};182183/* MCLK */184enum {185MT8189_I2SIN0_MCK,186MT8189_I2SIN1_MCK,187MT8189_I2SOUT0_MCK,188MT8189_I2SOUT1_MCK,189MT8189_FMI2S_MCK,190MT8189_TDMOUT_MCK,191MT8189_TDMOUT_BCK,192MT8189_MCK_NUM,193};194195enum {196CM0,197CM1,198CM_NUM,199};200201struct clk;202203struct mt8189_afe_private {204struct clk **clk;205struct regmap *pmic_regmap;206207/* dai */208void *dai_priv[MT8189_DAI_NUM];209210/* adda */211int mtkaif_protocol;212int mtkaif_chosen_phase[4];213int mtkaif_phase_cycle[4];214int mtkaif_calibration_num_phase;215int mtkaif_dmic;216int mtkaif_dmic_ch34;217218/* add for vs1 voter */219bool is_adda_dl_on;220bool is_adda_ul_on;221/* adda dl vol idx is at maximum */222bool is_adda_dl_max_vol;223/* current vote status of vs1 */224bool is_mt6363_vote;225226/* mck */227int mck_rate[MT8189_MCK_NUM];228229/* channel merge */230unsigned int cm_rate[CM_NUM];231unsigned int cm_channels;232};233234int mt8189_dai_adda_register(struct mtk_base_afe *afe);235int mt8189_dai_i2s_register(struct mtk_base_afe *afe);236int mt8189_dai_pcm_register(struct mtk_base_afe *afe);237int mt8189_dai_tdm_register(struct mtk_base_afe *afe);238239#endif240241242