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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/sound/soc/mediatek/mt8189/mt8189-dai-tdm.c
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1
// SPDX-License-Identifier: GPL-2.0
2
/*
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* MediaTek ALSA SoC Audio DAI TDM Control
4
*
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* Copyright (c) 2025 MediaTek Inc.
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* Author: Darren Ye <[email protected]>
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*/
8
9
#include <linux/regmap.h>
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#include <sound/pcm_params.h>
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#include "mt8189-afe-clk.h"
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#include "mt8189-afe-common.h"
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#include "mt8189-interconnection.h"
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#define DPTX_CH_EN_MASK_2CH (0x3)
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#define DPTX_CH_EN_MASK_4CH (0xf)
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#define DPTX_CH_EN_MASK_6CH (0x3f)
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#define DPTX_CH_EN_MASK_8CH (0xff)
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enum {
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SUPPLY_SEQ_APLL,
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SUPPLY_SEQ_TDM_MCK_EN,
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SUPPLY_SEQ_TDM_BCK_EN,
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SUPPLY_SEQ_TDM_DPTX_MCK_EN,
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SUPPLY_SEQ_TDM_DPTX_BCK_EN,
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SUPPLY_SEQ_TDM_CG_EN,
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};
30
31
enum {
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TDM_WLEN_8_BIT,
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TDM_WLEN_16_BIT,
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TDM_WLEN_24_BIT,
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TDM_WLEN_32_BIT,
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};
37
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enum {
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TDM_CHANNEL_BCK_16,
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TDM_CHANNEL_BCK_24,
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TDM_CHANNEL_BCK_32
42
};
43
44
enum {
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TDM_CHANNEL_NUM_2,
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TDM_CHANNEL_NUM_4,
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TDM_CHANNEL_NUM_8
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};
49
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enum {
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TDM_CH_START_O30_O31,
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TDM_CH_START_O32_O33,
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TDM_CH_START_O34_O35,
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TDM_CH_START_O36_O37,
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TDM_CH_ZERO,
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};
57
58
enum {
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DPTX_CHANNEL_2,
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DPTX_CHANNEL_8,
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};
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enum {
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DPTX_WLEN_24_BIT,
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DPTX_WLEN_16_BIT,
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};
67
68
struct mtk_afe_tdm_priv {
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int bck_id;
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int bck_rate;
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int mclk_id;
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int mclk_multiple; /* according to sample rate */
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int mclk_rate;
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int mclk_apll;
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};
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static unsigned int get_tdm_wlen(snd_pcm_format_t format)
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{
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return snd_pcm_format_physical_width(format) <= 16 ?
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TDM_WLEN_16_BIT : TDM_WLEN_32_BIT;
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}
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static unsigned int get_tdm_channel_bck(snd_pcm_format_t format)
85
{
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return snd_pcm_format_physical_width(format) <= 16 ?
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TDM_CHANNEL_BCK_16 : TDM_CHANNEL_BCK_32;
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}
89
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static unsigned int get_tdm_lrck_width(snd_pcm_format_t format)
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{
92
return snd_pcm_format_physical_width(format) - 1;
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}
94
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static unsigned int get_tdm_ch(unsigned int ch)
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{
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switch (ch) {
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case 1:
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case 2:
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return TDM_CHANNEL_NUM_2;
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case 3:
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case 4:
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return TDM_CHANNEL_NUM_4;
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case 5:
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case 6:
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case 7:
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case 8:
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default:
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return TDM_CHANNEL_NUM_8;
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}
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}
112
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static unsigned int get_dptx_ch_enable_mask(unsigned int ch)
114
{
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switch (ch) {
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case 1:
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case 2:
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return DPTX_CH_EN_MASK_2CH;
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case 3:
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case 4:
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return DPTX_CH_EN_MASK_4CH;
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case 5:
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case 6:
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return DPTX_CH_EN_MASK_6CH;
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case 7:
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case 8:
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return DPTX_CH_EN_MASK_8CH;
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default:
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return DPTX_CH_EN_MASK_2CH;
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}
131
}
132
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static unsigned int get_dptx_ch(unsigned int ch)
134
{
135
if (ch == 2)
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return DPTX_CHANNEL_2;
137
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return DPTX_CHANNEL_8;
139
}
140
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static unsigned int get_dptx_wlen(snd_pcm_format_t format)
142
{
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return snd_pcm_format_physical_width(format) <= 16 ?
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DPTX_WLEN_16_BIT : DPTX_WLEN_24_BIT;
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}
146
147
/* interconnection */
148
enum {
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HDMI_CONN_CH0,
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HDMI_CONN_CH1,
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HDMI_CONN_CH2,
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HDMI_CONN_CH3,
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HDMI_CONN_CH4,
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HDMI_CONN_CH5,
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HDMI_CONN_CH6,
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HDMI_CONN_CH7,
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};
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static const char *const hdmi_conn_mux_map[] = {
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"CH0", "CH1", "CH2", "CH3", "CH4", "CH5", "CH6", "CH7",
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};
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static int hdmi_conn_mux_map_value[] = {
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HDMI_CONN_CH0, HDMI_CONN_CH1, HDMI_CONN_CH2, HDMI_CONN_CH3,
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HDMI_CONN_CH4, HDMI_CONN_CH5, HDMI_CONN_CH6, HDMI_CONN_CH7,
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};
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static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch0_mux_map_enum,
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AFE_HDMI_CONN0,
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HDMI_O_0_SFT,
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HDMI_O_0_MASK,
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hdmi_conn_mux_map,
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hdmi_conn_mux_map_value);
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static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch1_mux_map_enum,
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AFE_HDMI_CONN0,
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HDMI_O_1_SFT,
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HDMI_O_1_MASK,
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hdmi_conn_mux_map,
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hdmi_conn_mux_map_value);
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static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch2_mux_map_enum,
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AFE_HDMI_CONN0,
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HDMI_O_2_SFT,
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HDMI_O_2_MASK,
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hdmi_conn_mux_map,
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hdmi_conn_mux_map_value);
188
189
static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch3_mux_map_enum,
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AFE_HDMI_CONN0,
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HDMI_O_3_SFT,
192
HDMI_O_3_MASK,
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hdmi_conn_mux_map,
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hdmi_conn_mux_map_value);
195
196
static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch4_mux_map_enum,
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AFE_HDMI_CONN0,
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HDMI_O_4_SFT,
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HDMI_O_4_MASK,
200
hdmi_conn_mux_map,
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hdmi_conn_mux_map_value);
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203
static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch5_mux_map_enum,
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AFE_HDMI_CONN0,
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HDMI_O_5_SFT,
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HDMI_O_5_MASK,
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hdmi_conn_mux_map,
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hdmi_conn_mux_map_value);
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210
static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch6_mux_map_enum,
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AFE_HDMI_CONN0,
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HDMI_O_6_SFT,
213
HDMI_O_6_MASK,
214
hdmi_conn_mux_map,
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hdmi_conn_mux_map_value);
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217
static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch7_mux_map_enum,
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AFE_HDMI_CONN0,
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HDMI_O_7_SFT,
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HDMI_O_7_MASK,
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hdmi_conn_mux_map,
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hdmi_conn_mux_map_value);
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static const struct snd_kcontrol_new mtk_dai_tdm_controls[] = {
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SOC_ENUM("HDMI_CH0_MUX", hdmi_ch0_mux_map_enum),
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SOC_ENUM("HDMI_CH1_MUX", hdmi_ch1_mux_map_enum),
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SOC_ENUM("HDMI_CH2_MUX", hdmi_ch2_mux_map_enum),
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SOC_ENUM("HDMI_CH3_MUX", hdmi_ch3_mux_map_enum),
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SOC_ENUM("HDMI_CH4_MUX", hdmi_ch4_mux_map_enum),
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SOC_ENUM("HDMI_CH5_MUX", hdmi_ch5_mux_map_enum),
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SOC_ENUM("HDMI_CH6_MUX", hdmi_ch6_mux_map_enum),
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SOC_ENUM("HDMI_CH7_MUX", hdmi_ch7_mux_map_enum),
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};
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235
static const char *const tdm_out_demux_texts[] = {
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"NONE", "TDMOUT", "DPTXOUT",
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};
238
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static SOC_ENUM_SINGLE_DECL(tdm_out_demux_enum,
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SND_SOC_NOPM,
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0,
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tdm_out_demux_texts);
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static const struct snd_kcontrol_new tdm_out_demux_control =
245
SOC_DAPM_ENUM("TDM Playback Route", tdm_out_demux_enum);
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247
static int get_tdm_id_by_name(const char *name)
248
{
249
if (strstr(name, "DPTX"))
250
return MT8189_DAI_TDM_DPTX;
251
252
return MT8189_DAI_TDM;
253
}
254
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static int mtk_tdm_bck_en_event(struct snd_soc_dapm_widget *w,
256
struct snd_kcontrol *kcontrol,
257
int event)
258
{
259
struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
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struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
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struct mt8189_afe_private *afe_priv = afe->platform_priv;
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int dai_id = get_tdm_id_by_name(w->name);
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struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id];
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dev_dbg(cmpnt->dev, "name %s, event 0x%x, dai_id %d, bck: %d\n",
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w->name, event, dai_id, tdm_priv->bck_rate);
267
268
switch (event) {
269
case SND_SOC_DAPM_PRE_PMU:
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mt8189_mck_enable(afe, tdm_priv->bck_id, tdm_priv->bck_rate);
271
break;
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case SND_SOC_DAPM_POST_PMD:
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mt8189_mck_disable(afe, tdm_priv->bck_id);
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break;
275
default:
276
break;
277
}
278
279
return 0;
280
}
281
282
static int mtk_tdm_mck_en_event(struct snd_soc_dapm_widget *w,
283
struct snd_kcontrol *kcontrol,
284
int event)
285
{
286
struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
287
struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
288
struct mt8189_afe_private *afe_priv = afe->platform_priv;
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int dai_id = get_tdm_id_by_name(w->name);
290
struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id];
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292
dev_dbg(cmpnt->dev, "name %s, event 0x%x, dai_id %d, mclk %d\n",
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w->name, event, dai_id, tdm_priv->mclk_rate);
294
295
switch (event) {
296
case SND_SOC_DAPM_PRE_PMU:
297
mt8189_mck_enable(afe, tdm_priv->mclk_id, tdm_priv->mclk_rate);
298
break;
299
case SND_SOC_DAPM_POST_PMD:
300
tdm_priv->mclk_rate = 0;
301
mt8189_mck_disable(afe, tdm_priv->mclk_id);
302
break;
303
default:
304
break;
305
}
306
307
return 0;
308
}
309
310
static const struct snd_soc_dapm_widget mtk_dai_tdm_widgets[] = {
311
SND_SOC_DAPM_DEMUX("TDM Playback Route", SND_SOC_NOPM, 0, 0,
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&tdm_out_demux_control),
313
314
SND_SOC_DAPM_SUPPLY_S("TDM_BCK", SUPPLY_SEQ_TDM_BCK_EN,
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SND_SOC_NOPM, 0, 0,
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mtk_tdm_bck_en_event,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
318
319
SND_SOC_DAPM_SUPPLY_S("TDM_MCK", SUPPLY_SEQ_TDM_MCK_EN,
320
SND_SOC_NOPM, 0, 0,
321
mtk_tdm_mck_en_event,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
323
324
SND_SOC_DAPM_SUPPLY_S("TDM_DPTX_BCK", SUPPLY_SEQ_TDM_DPTX_BCK_EN,
325
SND_SOC_NOPM, 0, 0,
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mtk_tdm_bck_en_event,
327
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
328
329
SND_SOC_DAPM_SUPPLY_S("TDM_DPTX_MCK", SUPPLY_SEQ_TDM_DPTX_MCK_EN,
330
SND_SOC_NOPM, 0, 0,
331
mtk_tdm_mck_en_event,
332
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
333
334
SND_SOC_DAPM_SUPPLY_S("TDM_CG", SUPPLY_SEQ_TDM_CG_EN,
335
AUDIO_TOP_CON2, PDN_TDM_OUT_SFT, 1,
336
NULL, 0),
337
};
338
339
static int mtk_afe_tdm_apll_connect(struct snd_soc_dapm_widget *source,
340
struct snd_soc_dapm_widget *sink)
341
{
342
struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(sink->dapm);
343
struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
344
struct mt8189_afe_private *afe_priv = afe->platform_priv;
345
int dai_id = get_tdm_id_by_name(sink->name);
346
struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id];
347
int cur_apll;
348
349
/* which apll */
350
cur_apll = mt8189_get_apll_by_name(afe, source->name);
351
352
return (tdm_priv->mclk_apll == cur_apll) ? 1 : 0;
353
}
354
355
static const struct snd_soc_dapm_route mtk_dai_tdm_routes[] = {
356
{"TDM Playback Route", NULL, "HDMI"},
357
358
{"TDM", "TDMOUT", "TDM Playback Route"},
359
{"TDM", NULL, "TDM_BCK"},
360
{"TDM", NULL, "TDM_CG"},
361
362
{"TDM_DPTX", "DPTXOUT", "TDM Playback Route"},
363
{"TDM_DPTX", NULL, "TDM_DPTX_BCK"},
364
{"TDM_DPTX", NULL, "TDM_CG"},
365
366
{"TDM_BCK", NULL, "TDM_MCK"},
367
{"TDM_DPTX_BCK", NULL, "TDM_DPTX_MCK"},
368
{"TDM_MCK", NULL, APLL1_W_NAME, mtk_afe_tdm_apll_connect},
369
{"TDM_MCK", NULL, APLL2_W_NAME, mtk_afe_tdm_apll_connect},
370
{"TDM_DPTX_MCK", NULL, APLL1_W_NAME, mtk_afe_tdm_apll_connect},
371
{"TDM_DPTX_MCK", NULL, APLL2_W_NAME, mtk_afe_tdm_apll_connect},
372
};
373
374
/* dai ops */
375
static int mtk_dai_tdm_cal_mclk(struct mtk_base_afe *afe,
376
struct mtk_afe_tdm_priv *tdm_priv,
377
int freq)
378
{
379
int apll;
380
int apll_rate;
381
382
apll = mt8189_get_apll_by_rate(afe, freq);
383
apll_rate = mt8189_get_apll_rate(afe, apll);
384
385
if (freq > apll_rate)
386
return -EINVAL;
387
388
if (apll_rate % freq != 0)
389
return -EINVAL;
390
391
tdm_priv->mclk_rate = freq;
392
tdm_priv->mclk_apll = apll;
393
394
return 0;
395
}
396
397
static int mtk_dai_tdm_hw_params(struct snd_pcm_substream *substream,
398
struct snd_pcm_hw_params *params,
399
struct snd_soc_dai *dai)
400
{
401
struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
402
struct mt8189_afe_private *afe_priv = afe->platform_priv;
403
int tdm_id = dai->id;
404
struct mtk_afe_tdm_priv *tdm_priv;
405
unsigned int rate = params_rate(params);
406
unsigned int channels = params_channels(params);
407
snd_pcm_format_t format = params_format(params);
408
unsigned int tdm_con;
409
410
if (tdm_id >= MT8189_DAI_NUM || tdm_id < 0)
411
return -EINVAL;
412
413
tdm_priv = afe_priv->dai_priv[tdm_id];
414
415
/* calculate mclk_rate, if not set explicitly */
416
if (!tdm_priv->mclk_rate) {
417
tdm_priv->mclk_rate = rate * tdm_priv->mclk_multiple;
418
mtk_dai_tdm_cal_mclk(afe,
419
tdm_priv,
420
tdm_priv->mclk_rate);
421
}
422
423
/* calculate bck */
424
tdm_priv->bck_rate = rate *
425
channels *
426
snd_pcm_format_physical_width(format);
427
428
if (tdm_priv->bck_rate > tdm_priv->mclk_rate)
429
return -EINVAL;
430
431
if (tdm_priv->mclk_rate % tdm_priv->bck_rate != 0)
432
return -EINVAL;
433
434
dev_dbg(afe->dev, "id %d, rate %d, ch %d, fmt %d, mclk %d, bck %d\n",
435
tdm_id, rate, channels, format,
436
tdm_priv->mclk_rate, tdm_priv->bck_rate);
437
438
/* set tdm */
439
tdm_con = 1 << LEFT_ALIGN_SFT;
440
tdm_con |= get_tdm_wlen(format) << WLEN_SFT;
441
tdm_con |= get_tdm_ch(channels) << CHANNEL_NUM_SFT;
442
tdm_con |= get_tdm_channel_bck(format) << CHANNEL_BCK_CYCLES_SFT;
443
tdm_con |= get_tdm_lrck_width(format) << LRCK_TDM_WIDTH_SFT;
444
regmap_write(afe->regmap, AFE_TDM_CON1, tdm_con);
445
446
/* set dptx */
447
if (tdm_id == MT8189_DAI_TDM_DPTX) {
448
regmap_update_bits(afe->regmap, AFE_DPTX_CON,
449
DPTX_CHANNEL_ENABLE_MASK_SFT,
450
get_dptx_ch_enable_mask(channels) <<
451
DPTX_CHANNEL_ENABLE_SFT);
452
regmap_update_bits(afe->regmap, AFE_DPTX_CON,
453
DPTX_CHANNEL_NUMBER_MASK_SFT,
454
get_dptx_ch(channels) <<
455
DPTX_CHANNEL_NUMBER_SFT);
456
regmap_update_bits(afe->regmap, AFE_DPTX_CON,
457
DPTX_16BIT_MASK_SFT,
458
get_dptx_wlen(format) << DPTX_16BIT_SFT);
459
}
460
switch (channels) {
461
case 1:
462
case 2:
463
tdm_con = TDM_CH_START_O30_O31 << ST_CH_PAIR_SOUT0_SFT;
464
tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT1_SFT;
465
tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT2_SFT;
466
tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT3_SFT;
467
break;
468
case 3:
469
case 4:
470
tdm_con = TDM_CH_START_O30_O31 << ST_CH_PAIR_SOUT0_SFT;
471
tdm_con |= TDM_CH_START_O32_O33 << ST_CH_PAIR_SOUT1_SFT;
472
tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT2_SFT;
473
tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT3_SFT;
474
break;
475
case 5:
476
case 6:
477
tdm_con = TDM_CH_START_O30_O31 << ST_CH_PAIR_SOUT0_SFT;
478
tdm_con |= TDM_CH_START_O32_O33 << ST_CH_PAIR_SOUT1_SFT;
479
tdm_con |= TDM_CH_START_O34_O35 << ST_CH_PAIR_SOUT2_SFT;
480
tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT3_SFT;
481
break;
482
case 7:
483
case 8:
484
tdm_con = TDM_CH_START_O30_O31 << ST_CH_PAIR_SOUT0_SFT;
485
tdm_con |= TDM_CH_START_O32_O33 << ST_CH_PAIR_SOUT1_SFT;
486
tdm_con |= TDM_CH_START_O34_O35 << ST_CH_PAIR_SOUT2_SFT;
487
tdm_con |= TDM_CH_START_O36_O37 << ST_CH_PAIR_SOUT3_SFT;
488
break;
489
default:
490
tdm_con = 0;
491
}
492
regmap_write(afe->regmap, AFE_TDM_CON2, tdm_con);
493
regmap_update_bits(afe->regmap, AFE_HDMI_OUT_CON0,
494
HDMI_CH_NUM_MASK_SFT,
495
channels << HDMI_CH_NUM_SFT);
496
497
return 0;
498
}
499
500
static int mtk_dai_tdm_trigger(struct snd_pcm_substream *substream,
501
int cmd,
502
struct snd_soc_dai *dai)
503
{
504
struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
505
int tdm_id = dai->id;
506
507
dev_dbg(afe->dev, "%s(), cmd %d, tdm_id %d\n", __func__, cmd, tdm_id);
508
509
switch (cmd) {
510
case SNDRV_PCM_TRIGGER_START:
511
case SNDRV_PCM_TRIGGER_RESUME:
512
/* enable Out control */
513
regmap_update_bits(afe->regmap, AFE_HDMI_OUT_CON0,
514
HDMI_OUT_ON_MASK_SFT,
515
0x1 << HDMI_OUT_ON_SFT);
516
517
/* enable dptx */
518
if (tdm_id == MT8189_DAI_TDM_DPTX) {
519
regmap_update_bits(afe->regmap, AFE_DPTX_CON,
520
DPTX_ON_MASK_SFT, 0x1 <<
521
DPTX_ON_SFT);
522
}
523
524
/* enable tdm */
525
regmap_update_bits(afe->regmap, AFE_TDM_CON1,
526
TDM_EN_MASK_SFT, 0x1 << TDM_EN_SFT);
527
break;
528
case SNDRV_PCM_TRIGGER_STOP:
529
case SNDRV_PCM_TRIGGER_SUSPEND:
530
/* disable tdm */
531
regmap_update_bits(afe->regmap, AFE_TDM_CON1,
532
TDM_EN_MASK_SFT, 0);
533
534
/* disable dptx */
535
if (tdm_id == MT8189_DAI_TDM_DPTX) {
536
regmap_update_bits(afe->regmap, AFE_DPTX_CON,
537
DPTX_ON_MASK_SFT, 0);
538
}
539
540
/* disable Out control */
541
regmap_update_bits(afe->regmap, AFE_HDMI_OUT_CON0,
542
HDMI_OUT_ON_MASK_SFT, 0);
543
break;
544
default:
545
return -EINVAL;
546
}
547
548
return 0;
549
}
550
551
static int mtk_dai_tdm_set_sysclk(struct snd_soc_dai *dai,
552
int clk_id, unsigned int freq, int dir)
553
{
554
struct mtk_base_afe *afe = dev_get_drvdata(dai->dev);
555
struct mt8189_afe_private *afe_priv = afe->platform_priv;
556
struct mtk_afe_tdm_priv *tdm_priv;
557
558
if (dai->id >= MT8189_DAI_NUM || dai->id < 0)
559
return -EINVAL;
560
561
tdm_priv = afe_priv->dai_priv[dai->id];
562
563
if (!tdm_priv)
564
return -EINVAL;
565
566
if (dir != SND_SOC_CLOCK_OUT)
567
return -EINVAL;
568
569
dev_dbg(afe->dev, "%s(), freq %d\n", __func__, freq);
570
571
return mtk_dai_tdm_cal_mclk(afe, tdm_priv, freq);
572
}
573
574
static const struct snd_soc_dai_ops mtk_dai_tdm_ops = {
575
.hw_params = mtk_dai_tdm_hw_params,
576
.trigger = mtk_dai_tdm_trigger,
577
.set_sysclk = mtk_dai_tdm_set_sysclk,
578
};
579
580
/* dai driver */
581
#define MTK_TDM_RATES (SNDRV_PCM_RATE_8000_48000 |\
582
SNDRV_PCM_RATE_88200 |\
583
SNDRV_PCM_RATE_96000 |\
584
SNDRV_PCM_RATE_176400 |\
585
SNDRV_PCM_RATE_192000)
586
587
#define MTK_TDM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
588
SNDRV_PCM_FMTBIT_S24_LE |\
589
SNDRV_PCM_FMTBIT_S32_LE)
590
591
static struct snd_soc_dai_driver mtk_dai_tdm_driver[] = {
592
{
593
.name = "TDM",
594
.id = MT8189_DAI_TDM,
595
.playback = {
596
.stream_name = "TDM",
597
.channels_min = 2,
598
.channels_max = 8,
599
.rates = MTK_TDM_RATES,
600
.formats = MTK_TDM_FORMATS,
601
},
602
.ops = &mtk_dai_tdm_ops,
603
},
604
{
605
.name = "TDM_DPTX",
606
.id = MT8189_DAI_TDM_DPTX,
607
.playback = {
608
.stream_name = "TDM_DPTX",
609
.channels_min = 2,
610
.channels_max = 8,
611
.rates = MTK_TDM_RATES,
612
.formats = MTK_TDM_FORMATS,
613
},
614
.ops = &mtk_dai_tdm_ops,
615
},
616
};
617
618
static struct mtk_afe_tdm_priv *init_tdm_priv_data(struct mtk_base_afe *afe,
619
int id)
620
{
621
struct mtk_afe_tdm_priv *tdm_priv;
622
623
tdm_priv = devm_kzalloc(afe->dev, sizeof(struct mtk_afe_tdm_priv),
624
GFP_KERNEL);
625
if (!tdm_priv)
626
return NULL;
627
628
if (id == MT8189_DAI_TDM_DPTX)
629
tdm_priv->mclk_multiple = 256;
630
else
631
tdm_priv->mclk_multiple = 128;
632
633
tdm_priv->bck_id = MT8189_TDMOUT_BCK;
634
tdm_priv->mclk_id = MT8189_TDMOUT_MCK;
635
636
return tdm_priv;
637
}
638
639
int mt8189_dai_tdm_register(struct mtk_base_afe *afe)
640
{
641
struct mt8189_afe_private *afe_priv = afe->platform_priv;
642
struct mtk_afe_tdm_priv *tdm_priv, *tdm_dptx_priv;
643
struct mtk_base_afe_dai *dai;
644
645
dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
646
if (!dai)
647
return -ENOMEM;
648
649
dai->dai_drivers = mtk_dai_tdm_driver;
650
dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_tdm_driver);
651
dai->controls = mtk_dai_tdm_controls;
652
dai->num_controls = ARRAY_SIZE(mtk_dai_tdm_controls);
653
dai->dapm_widgets = mtk_dai_tdm_widgets;
654
dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_tdm_widgets);
655
dai->dapm_routes = mtk_dai_tdm_routes;
656
dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_tdm_routes);
657
658
tdm_priv = init_tdm_priv_data(afe, MT8189_DAI_TDM);
659
if (!tdm_priv)
660
return -ENOMEM;
661
662
tdm_dptx_priv = init_tdm_priv_data(afe, MT8189_DAI_TDM_DPTX);
663
if (!tdm_dptx_priv)
664
return -ENOMEM;
665
666
list_add(&dai->list, &afe->sub_dais);
667
668
afe_priv->dai_priv[MT8189_DAI_TDM] = tdm_priv;
669
afe_priv->dai_priv[MT8189_DAI_TDM_DPTX] = tdm_dptx_priv;
670
671
return 0;
672
}
673
674