Path: blob/master/sound/soc/mediatek/mt8189/mt8189-dai-tdm.c
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// SPDX-License-Identifier: GPL-2.01/*2* MediaTek ALSA SoC Audio DAI TDM Control3*4* Copyright (c) 2025 MediaTek Inc.5* Author: Darren Ye <[email protected]>6*/78#include <linux/regmap.h>910#include <sound/pcm_params.h>1112#include "mt8189-afe-clk.h"13#include "mt8189-afe-common.h"14#include "mt8189-interconnection.h"1516#define DPTX_CH_EN_MASK_2CH (0x3)17#define DPTX_CH_EN_MASK_4CH (0xf)18#define DPTX_CH_EN_MASK_6CH (0x3f)19#define DPTX_CH_EN_MASK_8CH (0xff)2021enum {22SUPPLY_SEQ_APLL,23SUPPLY_SEQ_TDM_MCK_EN,24SUPPLY_SEQ_TDM_BCK_EN,25SUPPLY_SEQ_TDM_DPTX_MCK_EN,26SUPPLY_SEQ_TDM_DPTX_BCK_EN,27SUPPLY_SEQ_TDM_CG_EN,28};2930enum {31TDM_WLEN_8_BIT,32TDM_WLEN_16_BIT,33TDM_WLEN_24_BIT,34TDM_WLEN_32_BIT,35};3637enum {38TDM_CHANNEL_BCK_16,39TDM_CHANNEL_BCK_24,40TDM_CHANNEL_BCK_3241};4243enum {44TDM_CHANNEL_NUM_2,45TDM_CHANNEL_NUM_4,46TDM_CHANNEL_NUM_847};4849enum {50TDM_CH_START_O30_O31,51TDM_CH_START_O32_O33,52TDM_CH_START_O34_O35,53TDM_CH_START_O36_O37,54TDM_CH_ZERO,55};5657enum {58DPTX_CHANNEL_2,59DPTX_CHANNEL_8,60};6162enum {63DPTX_WLEN_24_BIT,64DPTX_WLEN_16_BIT,65};6667struct mtk_afe_tdm_priv {68int bck_id;69int bck_rate;7071int mclk_id;72int mclk_multiple; /* according to sample rate */73int mclk_rate;74int mclk_apll;75};7677static unsigned int get_tdm_wlen(snd_pcm_format_t format)78{79return snd_pcm_format_physical_width(format) <= 16 ?80TDM_WLEN_16_BIT : TDM_WLEN_32_BIT;81}8283static unsigned int get_tdm_channel_bck(snd_pcm_format_t format)84{85return snd_pcm_format_physical_width(format) <= 16 ?86TDM_CHANNEL_BCK_16 : TDM_CHANNEL_BCK_32;87}8889static unsigned int get_tdm_lrck_width(snd_pcm_format_t format)90{91return snd_pcm_format_physical_width(format) - 1;92}9394static unsigned int get_tdm_ch(unsigned int ch)95{96switch (ch) {97case 1:98case 2:99return TDM_CHANNEL_NUM_2;100case 3:101case 4:102return TDM_CHANNEL_NUM_4;103case 5:104case 6:105case 7:106case 8:107default:108return TDM_CHANNEL_NUM_8;109}110}111112static unsigned int get_dptx_ch_enable_mask(unsigned int ch)113{114switch (ch) {115case 1:116case 2:117return DPTX_CH_EN_MASK_2CH;118case 3:119case 4:120return DPTX_CH_EN_MASK_4CH;121case 5:122case 6:123return DPTX_CH_EN_MASK_6CH;124case 7:125case 8:126return DPTX_CH_EN_MASK_8CH;127default:128return DPTX_CH_EN_MASK_2CH;129}130}131132static unsigned int get_dptx_ch(unsigned int ch)133{134if (ch == 2)135return DPTX_CHANNEL_2;136137return DPTX_CHANNEL_8;138}139140static unsigned int get_dptx_wlen(snd_pcm_format_t format)141{142return snd_pcm_format_physical_width(format) <= 16 ?143DPTX_WLEN_16_BIT : DPTX_WLEN_24_BIT;144}145146/* interconnection */147enum {148HDMI_CONN_CH0,149HDMI_CONN_CH1,150HDMI_CONN_CH2,151HDMI_CONN_CH3,152HDMI_CONN_CH4,153HDMI_CONN_CH5,154HDMI_CONN_CH6,155HDMI_CONN_CH7,156};157158static const char *const hdmi_conn_mux_map[] = {159"CH0", "CH1", "CH2", "CH3", "CH4", "CH5", "CH6", "CH7",160};161162static int hdmi_conn_mux_map_value[] = {163HDMI_CONN_CH0, HDMI_CONN_CH1, HDMI_CONN_CH2, HDMI_CONN_CH3,164HDMI_CONN_CH4, HDMI_CONN_CH5, HDMI_CONN_CH6, HDMI_CONN_CH7,165};166167static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch0_mux_map_enum,168AFE_HDMI_CONN0,169HDMI_O_0_SFT,170HDMI_O_0_MASK,171hdmi_conn_mux_map,172hdmi_conn_mux_map_value);173174static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch1_mux_map_enum,175AFE_HDMI_CONN0,176HDMI_O_1_SFT,177HDMI_O_1_MASK,178hdmi_conn_mux_map,179hdmi_conn_mux_map_value);180181static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch2_mux_map_enum,182AFE_HDMI_CONN0,183HDMI_O_2_SFT,184HDMI_O_2_MASK,185hdmi_conn_mux_map,186hdmi_conn_mux_map_value);187188static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch3_mux_map_enum,189AFE_HDMI_CONN0,190HDMI_O_3_SFT,191HDMI_O_3_MASK,192hdmi_conn_mux_map,193hdmi_conn_mux_map_value);194195static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch4_mux_map_enum,196AFE_HDMI_CONN0,197HDMI_O_4_SFT,198HDMI_O_4_MASK,199hdmi_conn_mux_map,200hdmi_conn_mux_map_value);201202static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch5_mux_map_enum,203AFE_HDMI_CONN0,204HDMI_O_5_SFT,205HDMI_O_5_MASK,206hdmi_conn_mux_map,207hdmi_conn_mux_map_value);208209static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch6_mux_map_enum,210AFE_HDMI_CONN0,211HDMI_O_6_SFT,212HDMI_O_6_MASK,213hdmi_conn_mux_map,214hdmi_conn_mux_map_value);215216static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch7_mux_map_enum,217AFE_HDMI_CONN0,218HDMI_O_7_SFT,219HDMI_O_7_MASK,220hdmi_conn_mux_map,221hdmi_conn_mux_map_value);222223static const struct snd_kcontrol_new mtk_dai_tdm_controls[] = {224SOC_ENUM("HDMI_CH0_MUX", hdmi_ch0_mux_map_enum),225SOC_ENUM("HDMI_CH1_MUX", hdmi_ch1_mux_map_enum),226SOC_ENUM("HDMI_CH2_MUX", hdmi_ch2_mux_map_enum),227SOC_ENUM("HDMI_CH3_MUX", hdmi_ch3_mux_map_enum),228SOC_ENUM("HDMI_CH4_MUX", hdmi_ch4_mux_map_enum),229SOC_ENUM("HDMI_CH5_MUX", hdmi_ch5_mux_map_enum),230SOC_ENUM("HDMI_CH6_MUX", hdmi_ch6_mux_map_enum),231SOC_ENUM("HDMI_CH7_MUX", hdmi_ch7_mux_map_enum),232};233234static const char *const tdm_out_demux_texts[] = {235"NONE", "TDMOUT", "DPTXOUT",236};237238static SOC_ENUM_SINGLE_DECL(tdm_out_demux_enum,239SND_SOC_NOPM,2400,241tdm_out_demux_texts);242243static const struct snd_kcontrol_new tdm_out_demux_control =244SOC_DAPM_ENUM("TDM Playback Route", tdm_out_demux_enum);245246static int get_tdm_id_by_name(const char *name)247{248if (strstr(name, "DPTX"))249return MT8189_DAI_TDM_DPTX;250251return MT8189_DAI_TDM;252}253254static int mtk_tdm_bck_en_event(struct snd_soc_dapm_widget *w,255struct snd_kcontrol *kcontrol,256int event)257{258struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);259struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);260struct mt8189_afe_private *afe_priv = afe->platform_priv;261int dai_id = get_tdm_id_by_name(w->name);262struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id];263264dev_dbg(cmpnt->dev, "name %s, event 0x%x, dai_id %d, bck: %d\n",265w->name, event, dai_id, tdm_priv->bck_rate);266267switch (event) {268case SND_SOC_DAPM_PRE_PMU:269mt8189_mck_enable(afe, tdm_priv->bck_id, tdm_priv->bck_rate);270break;271case SND_SOC_DAPM_POST_PMD:272mt8189_mck_disable(afe, tdm_priv->bck_id);273break;274default:275break;276}277278return 0;279}280281static int mtk_tdm_mck_en_event(struct snd_soc_dapm_widget *w,282struct snd_kcontrol *kcontrol,283int event)284{285struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);286struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);287struct mt8189_afe_private *afe_priv = afe->platform_priv;288int dai_id = get_tdm_id_by_name(w->name);289struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id];290291dev_dbg(cmpnt->dev, "name %s, event 0x%x, dai_id %d, mclk %d\n",292w->name, event, dai_id, tdm_priv->mclk_rate);293294switch (event) {295case SND_SOC_DAPM_PRE_PMU:296mt8189_mck_enable(afe, tdm_priv->mclk_id, tdm_priv->mclk_rate);297break;298case SND_SOC_DAPM_POST_PMD:299tdm_priv->mclk_rate = 0;300mt8189_mck_disable(afe, tdm_priv->mclk_id);301break;302default:303break;304}305306return 0;307}308309static const struct snd_soc_dapm_widget mtk_dai_tdm_widgets[] = {310SND_SOC_DAPM_DEMUX("TDM Playback Route", SND_SOC_NOPM, 0, 0,311&tdm_out_demux_control),312313SND_SOC_DAPM_SUPPLY_S("TDM_BCK", SUPPLY_SEQ_TDM_BCK_EN,314SND_SOC_NOPM, 0, 0,315mtk_tdm_bck_en_event,316SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),317318SND_SOC_DAPM_SUPPLY_S("TDM_MCK", SUPPLY_SEQ_TDM_MCK_EN,319SND_SOC_NOPM, 0, 0,320mtk_tdm_mck_en_event,321SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),322323SND_SOC_DAPM_SUPPLY_S("TDM_DPTX_BCK", SUPPLY_SEQ_TDM_DPTX_BCK_EN,324SND_SOC_NOPM, 0, 0,325mtk_tdm_bck_en_event,326SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),327328SND_SOC_DAPM_SUPPLY_S("TDM_DPTX_MCK", SUPPLY_SEQ_TDM_DPTX_MCK_EN,329SND_SOC_NOPM, 0, 0,330mtk_tdm_mck_en_event,331SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),332333SND_SOC_DAPM_SUPPLY_S("TDM_CG", SUPPLY_SEQ_TDM_CG_EN,334AUDIO_TOP_CON2, PDN_TDM_OUT_SFT, 1,335NULL, 0),336};337338static int mtk_afe_tdm_apll_connect(struct snd_soc_dapm_widget *source,339struct snd_soc_dapm_widget *sink)340{341struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(sink->dapm);342struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);343struct mt8189_afe_private *afe_priv = afe->platform_priv;344int dai_id = get_tdm_id_by_name(sink->name);345struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id];346int cur_apll;347348/* which apll */349cur_apll = mt8189_get_apll_by_name(afe, source->name);350351return (tdm_priv->mclk_apll == cur_apll) ? 1 : 0;352}353354static const struct snd_soc_dapm_route mtk_dai_tdm_routes[] = {355{"TDM Playback Route", NULL, "HDMI"},356357{"TDM", "TDMOUT", "TDM Playback Route"},358{"TDM", NULL, "TDM_BCK"},359{"TDM", NULL, "TDM_CG"},360361{"TDM_DPTX", "DPTXOUT", "TDM Playback Route"},362{"TDM_DPTX", NULL, "TDM_DPTX_BCK"},363{"TDM_DPTX", NULL, "TDM_CG"},364365{"TDM_BCK", NULL, "TDM_MCK"},366{"TDM_DPTX_BCK", NULL, "TDM_DPTX_MCK"},367{"TDM_MCK", NULL, APLL1_W_NAME, mtk_afe_tdm_apll_connect},368{"TDM_MCK", NULL, APLL2_W_NAME, mtk_afe_tdm_apll_connect},369{"TDM_DPTX_MCK", NULL, APLL1_W_NAME, mtk_afe_tdm_apll_connect},370{"TDM_DPTX_MCK", NULL, APLL2_W_NAME, mtk_afe_tdm_apll_connect},371};372373/* dai ops */374static int mtk_dai_tdm_cal_mclk(struct mtk_base_afe *afe,375struct mtk_afe_tdm_priv *tdm_priv,376int freq)377{378int apll;379int apll_rate;380381apll = mt8189_get_apll_by_rate(afe, freq);382apll_rate = mt8189_get_apll_rate(afe, apll);383384if (freq > apll_rate)385return -EINVAL;386387if (apll_rate % freq != 0)388return -EINVAL;389390tdm_priv->mclk_rate = freq;391tdm_priv->mclk_apll = apll;392393return 0;394}395396static int mtk_dai_tdm_hw_params(struct snd_pcm_substream *substream,397struct snd_pcm_hw_params *params,398struct snd_soc_dai *dai)399{400struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);401struct mt8189_afe_private *afe_priv = afe->platform_priv;402int tdm_id = dai->id;403struct mtk_afe_tdm_priv *tdm_priv;404unsigned int rate = params_rate(params);405unsigned int channels = params_channels(params);406snd_pcm_format_t format = params_format(params);407unsigned int tdm_con;408409if (tdm_id >= MT8189_DAI_NUM || tdm_id < 0)410return -EINVAL;411412tdm_priv = afe_priv->dai_priv[tdm_id];413414/* calculate mclk_rate, if not set explicitly */415if (!tdm_priv->mclk_rate) {416tdm_priv->mclk_rate = rate * tdm_priv->mclk_multiple;417mtk_dai_tdm_cal_mclk(afe,418tdm_priv,419tdm_priv->mclk_rate);420}421422/* calculate bck */423tdm_priv->bck_rate = rate *424channels *425snd_pcm_format_physical_width(format);426427if (tdm_priv->bck_rate > tdm_priv->mclk_rate)428return -EINVAL;429430if (tdm_priv->mclk_rate % tdm_priv->bck_rate != 0)431return -EINVAL;432433dev_dbg(afe->dev, "id %d, rate %d, ch %d, fmt %d, mclk %d, bck %d\n",434tdm_id, rate, channels, format,435tdm_priv->mclk_rate, tdm_priv->bck_rate);436437/* set tdm */438tdm_con = 1 << LEFT_ALIGN_SFT;439tdm_con |= get_tdm_wlen(format) << WLEN_SFT;440tdm_con |= get_tdm_ch(channels) << CHANNEL_NUM_SFT;441tdm_con |= get_tdm_channel_bck(format) << CHANNEL_BCK_CYCLES_SFT;442tdm_con |= get_tdm_lrck_width(format) << LRCK_TDM_WIDTH_SFT;443regmap_write(afe->regmap, AFE_TDM_CON1, tdm_con);444445/* set dptx */446if (tdm_id == MT8189_DAI_TDM_DPTX) {447regmap_update_bits(afe->regmap, AFE_DPTX_CON,448DPTX_CHANNEL_ENABLE_MASK_SFT,449get_dptx_ch_enable_mask(channels) <<450DPTX_CHANNEL_ENABLE_SFT);451regmap_update_bits(afe->regmap, AFE_DPTX_CON,452DPTX_CHANNEL_NUMBER_MASK_SFT,453get_dptx_ch(channels) <<454DPTX_CHANNEL_NUMBER_SFT);455regmap_update_bits(afe->regmap, AFE_DPTX_CON,456DPTX_16BIT_MASK_SFT,457get_dptx_wlen(format) << DPTX_16BIT_SFT);458}459switch (channels) {460case 1:461case 2:462tdm_con = TDM_CH_START_O30_O31 << ST_CH_PAIR_SOUT0_SFT;463tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT1_SFT;464tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT2_SFT;465tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT3_SFT;466break;467case 3:468case 4:469tdm_con = TDM_CH_START_O30_O31 << ST_CH_PAIR_SOUT0_SFT;470tdm_con |= TDM_CH_START_O32_O33 << ST_CH_PAIR_SOUT1_SFT;471tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT2_SFT;472tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT3_SFT;473break;474case 5:475case 6:476tdm_con = TDM_CH_START_O30_O31 << ST_CH_PAIR_SOUT0_SFT;477tdm_con |= TDM_CH_START_O32_O33 << ST_CH_PAIR_SOUT1_SFT;478tdm_con |= TDM_CH_START_O34_O35 << ST_CH_PAIR_SOUT2_SFT;479tdm_con |= TDM_CH_ZERO << ST_CH_PAIR_SOUT3_SFT;480break;481case 7:482case 8:483tdm_con = TDM_CH_START_O30_O31 << ST_CH_PAIR_SOUT0_SFT;484tdm_con |= TDM_CH_START_O32_O33 << ST_CH_PAIR_SOUT1_SFT;485tdm_con |= TDM_CH_START_O34_O35 << ST_CH_PAIR_SOUT2_SFT;486tdm_con |= TDM_CH_START_O36_O37 << ST_CH_PAIR_SOUT3_SFT;487break;488default:489tdm_con = 0;490}491regmap_write(afe->regmap, AFE_TDM_CON2, tdm_con);492regmap_update_bits(afe->regmap, AFE_HDMI_OUT_CON0,493HDMI_CH_NUM_MASK_SFT,494channels << HDMI_CH_NUM_SFT);495496return 0;497}498499static int mtk_dai_tdm_trigger(struct snd_pcm_substream *substream,500int cmd,501struct snd_soc_dai *dai)502{503struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);504int tdm_id = dai->id;505506dev_dbg(afe->dev, "%s(), cmd %d, tdm_id %d\n", __func__, cmd, tdm_id);507508switch (cmd) {509case SNDRV_PCM_TRIGGER_START:510case SNDRV_PCM_TRIGGER_RESUME:511/* enable Out control */512regmap_update_bits(afe->regmap, AFE_HDMI_OUT_CON0,513HDMI_OUT_ON_MASK_SFT,5140x1 << HDMI_OUT_ON_SFT);515516/* enable dptx */517if (tdm_id == MT8189_DAI_TDM_DPTX) {518regmap_update_bits(afe->regmap, AFE_DPTX_CON,519DPTX_ON_MASK_SFT, 0x1 <<520DPTX_ON_SFT);521}522523/* enable tdm */524regmap_update_bits(afe->regmap, AFE_TDM_CON1,525TDM_EN_MASK_SFT, 0x1 << TDM_EN_SFT);526break;527case SNDRV_PCM_TRIGGER_STOP:528case SNDRV_PCM_TRIGGER_SUSPEND:529/* disable tdm */530regmap_update_bits(afe->regmap, AFE_TDM_CON1,531TDM_EN_MASK_SFT, 0);532533/* disable dptx */534if (tdm_id == MT8189_DAI_TDM_DPTX) {535regmap_update_bits(afe->regmap, AFE_DPTX_CON,536DPTX_ON_MASK_SFT, 0);537}538539/* disable Out control */540regmap_update_bits(afe->regmap, AFE_HDMI_OUT_CON0,541HDMI_OUT_ON_MASK_SFT, 0);542break;543default:544return -EINVAL;545}546547return 0;548}549550static int mtk_dai_tdm_set_sysclk(struct snd_soc_dai *dai,551int clk_id, unsigned int freq, int dir)552{553struct mtk_base_afe *afe = dev_get_drvdata(dai->dev);554struct mt8189_afe_private *afe_priv = afe->platform_priv;555struct mtk_afe_tdm_priv *tdm_priv;556557if (dai->id >= MT8189_DAI_NUM || dai->id < 0)558return -EINVAL;559560tdm_priv = afe_priv->dai_priv[dai->id];561562if (!tdm_priv)563return -EINVAL;564565if (dir != SND_SOC_CLOCK_OUT)566return -EINVAL;567568dev_dbg(afe->dev, "%s(), freq %d\n", __func__, freq);569570return mtk_dai_tdm_cal_mclk(afe, tdm_priv, freq);571}572573static const struct snd_soc_dai_ops mtk_dai_tdm_ops = {574.hw_params = mtk_dai_tdm_hw_params,575.trigger = mtk_dai_tdm_trigger,576.set_sysclk = mtk_dai_tdm_set_sysclk,577};578579/* dai driver */580#define MTK_TDM_RATES (SNDRV_PCM_RATE_8000_48000 |\581SNDRV_PCM_RATE_88200 |\582SNDRV_PCM_RATE_96000 |\583SNDRV_PCM_RATE_176400 |\584SNDRV_PCM_RATE_192000)585586#define MTK_TDM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\587SNDRV_PCM_FMTBIT_S24_LE |\588SNDRV_PCM_FMTBIT_S32_LE)589590static struct snd_soc_dai_driver mtk_dai_tdm_driver[] = {591{592.name = "TDM",593.id = MT8189_DAI_TDM,594.playback = {595.stream_name = "TDM",596.channels_min = 2,597.channels_max = 8,598.rates = MTK_TDM_RATES,599.formats = MTK_TDM_FORMATS,600},601.ops = &mtk_dai_tdm_ops,602},603{604.name = "TDM_DPTX",605.id = MT8189_DAI_TDM_DPTX,606.playback = {607.stream_name = "TDM_DPTX",608.channels_min = 2,609.channels_max = 8,610.rates = MTK_TDM_RATES,611.formats = MTK_TDM_FORMATS,612},613.ops = &mtk_dai_tdm_ops,614},615};616617static struct mtk_afe_tdm_priv *init_tdm_priv_data(struct mtk_base_afe *afe,618int id)619{620struct mtk_afe_tdm_priv *tdm_priv;621622tdm_priv = devm_kzalloc(afe->dev, sizeof(struct mtk_afe_tdm_priv),623GFP_KERNEL);624if (!tdm_priv)625return NULL;626627if (id == MT8189_DAI_TDM_DPTX)628tdm_priv->mclk_multiple = 256;629else630tdm_priv->mclk_multiple = 128;631632tdm_priv->bck_id = MT8189_TDMOUT_BCK;633tdm_priv->mclk_id = MT8189_TDMOUT_MCK;634635return tdm_priv;636}637638int mt8189_dai_tdm_register(struct mtk_base_afe *afe)639{640struct mt8189_afe_private *afe_priv = afe->platform_priv;641struct mtk_afe_tdm_priv *tdm_priv, *tdm_dptx_priv;642struct mtk_base_afe_dai *dai;643644dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);645if (!dai)646return -ENOMEM;647648dai->dai_drivers = mtk_dai_tdm_driver;649dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_tdm_driver);650dai->controls = mtk_dai_tdm_controls;651dai->num_controls = ARRAY_SIZE(mtk_dai_tdm_controls);652dai->dapm_widgets = mtk_dai_tdm_widgets;653dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_tdm_widgets);654dai->dapm_routes = mtk_dai_tdm_routes;655dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_tdm_routes);656657tdm_priv = init_tdm_priv_data(afe, MT8189_DAI_TDM);658if (!tdm_priv)659return -ENOMEM;660661tdm_dptx_priv = init_tdm_priv_data(afe, MT8189_DAI_TDM_DPTX);662if (!tdm_dptx_priv)663return -ENOMEM;664665list_add(&dai->list, &afe->sub_dais);666667afe_priv->dai_priv[MT8189_DAI_TDM] = tdm_priv;668afe_priv->dai_priv[MT8189_DAI_TDM_DPTX] = tdm_dptx_priv;669670return 0;671}672673674