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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/sound/soc/mediatek/mt8192/mt8192-afe-common.h
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/* SPDX-License-Identifier: GPL-2.0 */

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/*

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 * mt8192-afe-common.h  --  Mediatek 8192 audio driver definitions

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 *

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 * Copyright (c) 2020 MediaTek Inc.

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 * Author: Shane Chien <[email protected]>

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 */

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#ifndef _MT_8192_AFE_COMMON_H_

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#define _MT_8192_AFE_COMMON_H_

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#include <linux/list.h>

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#include <linux/regmap.h>

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#include <sound/soc.h>

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#include "../common/mtk-base-afe.h"

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#include "mt8192-reg.h"

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enum {

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	MT8192_MEMIF_DL1,

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	MT8192_MEMIF_DL12,

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	MT8192_MEMIF_DL2,

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	MT8192_MEMIF_DL3,

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	MT8192_MEMIF_DL4,

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	MT8192_MEMIF_DL5,

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	MT8192_MEMIF_DL6,

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	MT8192_MEMIF_DL7,

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	MT8192_MEMIF_DL8,

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	MT8192_MEMIF_DL9,

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	MT8192_MEMIF_DAI,

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	MT8192_MEMIF_DAI2,

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	MT8192_MEMIF_MOD_DAI,

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	MT8192_MEMIF_VUL12,

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	MT8192_MEMIF_VUL2,

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	MT8192_MEMIF_VUL3,

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	MT8192_MEMIF_VUL4,

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	MT8192_MEMIF_VUL5,

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	MT8192_MEMIF_VUL6,

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	MT8192_MEMIF_AWB,

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	MT8192_MEMIF_AWB2,

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	MT8192_MEMIF_HDMI,

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	MT8192_MEMIF_NUM,

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	MT8192_DAI_ADDA = MT8192_MEMIF_NUM,

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	MT8192_DAI_ADDA_CH34,

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	MT8192_DAI_AP_DMIC,

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	MT8192_DAI_AP_DMIC_CH34,

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	MT8192_DAI_VOW,

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	MT8192_DAI_CONNSYS_I2S,

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	MT8192_DAI_I2S_0,

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	MT8192_DAI_I2S_1,

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	MT8192_DAI_I2S_2,

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	MT8192_DAI_I2S_3,

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	MT8192_DAI_I2S_5,

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	MT8192_DAI_I2S_6,

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	MT8192_DAI_I2S_7,

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	MT8192_DAI_I2S_8,

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	MT8192_DAI_I2S_9,

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	MT8192_DAI_HW_GAIN_1,

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	MT8192_DAI_HW_GAIN_2,

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	MT8192_DAI_SRC_1,

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	MT8192_DAI_SRC_2,

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	MT8192_DAI_PCM_1,

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	MT8192_DAI_PCM_2,

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	MT8192_DAI_TDM,

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	MT8192_DAI_NUM,

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};

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enum {

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	MT8192_IRQ_0,

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	MT8192_IRQ_1,

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	MT8192_IRQ_2,

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	MT8192_IRQ_3,

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	MT8192_IRQ_4,

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	MT8192_IRQ_5,

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	MT8192_IRQ_6,

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	MT8192_IRQ_7,

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	MT8192_IRQ_8,

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	MT8192_IRQ_9,

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	MT8192_IRQ_10,

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	MT8192_IRQ_11,

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	MT8192_IRQ_12,

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	MT8192_IRQ_13,

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	MT8192_IRQ_14,

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	MT8192_IRQ_15,

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	MT8192_IRQ_16,

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	MT8192_IRQ_17,

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	MT8192_IRQ_18,

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	MT8192_IRQ_19,

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	MT8192_IRQ_20,

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	MT8192_IRQ_21,

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	MT8192_IRQ_22,

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	MT8192_IRQ_23,

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	MT8192_IRQ_24,

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	MT8192_IRQ_25,

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	MT8192_IRQ_26,

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	MT8192_IRQ_31,	/* used only for TDM */

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	MT8192_IRQ_NUM,

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};

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enum {

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	MTKAIF_PROTOCOL_1 = 0,

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	MTKAIF_PROTOCOL_2,

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	MTKAIF_PROTOCOL_2_CLK_P2,

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};

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enum {

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	MTK_AFE_ADDA_DL_GAIN_MUTE = 0,

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	MTK_AFE_ADDA_DL_GAIN_NORMAL = 0xf74f,

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	/* SA suggest apply -0.3db to audio/speech path */

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};

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/* MCLK */

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enum {

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	MT8192_I2S0_MCK = 0,

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	MT8192_I2S1_MCK,

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	MT8192_I2S2_MCK,

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	MT8192_I2S3_MCK,

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	MT8192_I2S4_MCK,

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	MT8192_I2S4_BCK,

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	MT8192_I2S5_MCK,

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	MT8192_I2S6_MCK,

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	MT8192_I2S7_MCK,

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	MT8192_I2S8_MCK,

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	MT8192_I2S9_MCK,

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	MT8192_MCK_NUM,

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};

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struct clk;

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struct mt8192_afe_private {

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	struct clk **clk;

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	struct regmap *topckgen;

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	struct regmap *apmixedsys;

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	struct regmap *infracfg;

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	int stf_positive_gain_db;

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	int pm_runtime_bypass_reg_ctl;

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	/* dai */

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	bool dai_on[MT8192_DAI_NUM];

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	void *dai_priv[MT8192_DAI_NUM];

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	/* adda */

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	int mtkaif_protocol;

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	int mtkaif_chosen_phase[4];

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	int mtkaif_phase_cycle[4];

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	int mtkaif_calibration_num_phase;

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	int mtkaif_dmic;

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	int mtkaif_dmic_ch34;

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	int mtkaif_adda6_only;

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	/* mck */

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	int mck_rate[MT8192_MCK_NUM];

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};

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int mt8192_dai_adda_register(struct mtk_base_afe *afe);

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int mt8192_dai_i2s_register(struct mtk_base_afe *afe);

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int mt8192_dai_hw_gain_register(struct mtk_base_afe *afe);

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int mt8192_dai_src_register(struct mtk_base_afe *afe);

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int mt8192_dai_pcm_register(struct mtk_base_afe *afe);

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int mt8192_dai_tdm_register(struct mtk_base_afe *afe);

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int mt8192_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name,

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			     const char *secondary_i2s_name);

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unsigned int mt8192_general_rate_transform(struct device *dev,

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					   unsigned int rate);

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unsigned int mt8192_rate_transform(struct device *dev,

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				   unsigned int rate, int aud_blk);

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int mt8192_dai_set_priv(struct mtk_base_afe *afe, int id,

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			int priv_size, const void *priv_data);

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#endif

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