Path: blob/master/tools/testing/nvdimm/test/nfit_test.h
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/* SPDX-License-Identifier: GPL-2.0-only */1/*2* Copyright(c) 2013-2015 Intel Corporation. All rights reserved.3*/4#ifndef __NFIT_TEST_H__5#define __NFIT_TEST_H__6#include <linux/acpi.h>7#include <linux/list.h>8#include <linux/uuid.h>9#include <linux/ioport.h>10#include <linux/spinlock_types.h>1112struct nfit_test_request {13struct list_head list;14struct resource res;15};1617struct nfit_test_resource {18struct list_head requests;19struct list_head list;20struct resource res;21struct device *dev;22spinlock_t lock;23int req_count;24void *buf;25};2627#define ND_TRANSLATE_SPA_STATUS_INVALID_SPA 228#define NFIT_ARS_INJECT_INVALID 22930enum err_inj_options {31ND_ARS_ERR_INJ_OPT_NOTIFY = 0,32};3334/* nfit commands */35enum nfit_cmd_num {36NFIT_CMD_TRANSLATE_SPA = 5,37NFIT_CMD_ARS_INJECT_SET = 7,38NFIT_CMD_ARS_INJECT_CLEAR = 8,39NFIT_CMD_ARS_INJECT_GET = 9,40};4142struct nd_cmd_translate_spa {43__u64 spa;44__u32 status;45__u8 flags;46__u8 _reserved[3];47__u64 translate_length;48__u32 num_nvdimms;49struct nd_nvdimm_device {50__u32 nfit_device_handle;51__u32 _reserved;52__u64 dpa;53} __packed devices[];5455} __packed;5657struct nd_cmd_ars_err_inj {58__u64 err_inj_spa_range_base;59__u64 err_inj_spa_range_length;60__u8 err_inj_options;61__u32 status;62} __packed;6364struct nd_cmd_ars_err_inj_clr {65__u64 err_inj_clr_spa_range_base;66__u64 err_inj_clr_spa_range_length;67__u32 status;68} __packed;6970struct nd_cmd_ars_err_inj_stat {71__u32 status;72__u32 inj_err_rec_count;73struct nd_error_stat_query_record {74__u64 err_inj_stat_spa_range_base;75__u64 err_inj_stat_spa_range_length;76} __packed record[];77} __packed;7879#define ND_INTEL_SMART 180#define ND_INTEL_SMART_THRESHOLD 281#define ND_INTEL_ENABLE_LSS_STATUS 1082#define ND_INTEL_FW_GET_INFO 1283#define ND_INTEL_FW_START_UPDATE 1384#define ND_INTEL_FW_SEND_DATA 1485#define ND_INTEL_FW_FINISH_UPDATE 1586#define ND_INTEL_FW_FINISH_QUERY 1687#define ND_INTEL_SMART_SET_THRESHOLD 1788#define ND_INTEL_SMART_INJECT 188990#define ND_INTEL_SMART_HEALTH_VALID (1 << 0)91#define ND_INTEL_SMART_SPARES_VALID (1 << 1)92#define ND_INTEL_SMART_USED_VALID (1 << 2)93#define ND_INTEL_SMART_MTEMP_VALID (1 << 3)94#define ND_INTEL_SMART_CTEMP_VALID (1 << 4)95#define ND_INTEL_SMART_SHUTDOWN_COUNT_VALID (1 << 5)96#define ND_INTEL_SMART_AIT_STATUS_VALID (1 << 6)97#define ND_INTEL_SMART_PTEMP_VALID (1 << 7)98#define ND_INTEL_SMART_ALARM_VALID (1 << 9)99#define ND_INTEL_SMART_SHUTDOWN_VALID (1 << 10)100#define ND_INTEL_SMART_VENDOR_VALID (1 << 11)101#define ND_INTEL_SMART_SPARE_TRIP (1 << 0)102#define ND_INTEL_SMART_TEMP_TRIP (1 << 1)103#define ND_INTEL_SMART_CTEMP_TRIP (1 << 2)104#define ND_INTEL_SMART_NON_CRITICAL_HEALTH (1 << 0)105#define ND_INTEL_SMART_CRITICAL_HEALTH (1 << 1)106#define ND_INTEL_SMART_FATAL_HEALTH (1 << 2)107#define ND_INTEL_SMART_INJECT_MTEMP (1 << 0)108#define ND_INTEL_SMART_INJECT_SPARE (1 << 1)109#define ND_INTEL_SMART_INJECT_FATAL (1 << 2)110#define ND_INTEL_SMART_INJECT_SHUTDOWN (1 << 3)111112struct nd_intel_smart_threshold {113__u32 status;114union {115struct {116__u16 alarm_control;117__u8 spares;118__u16 media_temperature;119__u16 ctrl_temperature;120__u8 reserved[1];121} __packed;122__u8 data[8];123};124} __packed;125126struct nd_intel_smart_set_threshold {127__u16 alarm_control;128__u8 spares;129__u16 media_temperature;130__u16 ctrl_temperature;131__u32 status;132} __packed;133134struct nd_intel_smart_inject {135__u64 flags;136__u8 mtemp_enable;137__u16 media_temperature;138__u8 spare_enable;139__u8 spares;140__u8 fatal_enable;141__u8 unsafe_shutdown_enable;142__u32 status;143} __packed;144145#define INTEL_FW_STORAGE_SIZE 0x100000146#define INTEL_FW_MAX_SEND_LEN 0xFFEC147#define INTEL_FW_QUERY_INTERVAL 250000148#define INTEL_FW_QUERY_MAX_TIME 3000000149#define INTEL_FW_FIS_VERSION 0x0105150#define INTEL_FW_FAKE_VERSION 0xffffffffabcd151152enum intel_fw_update_state {153FW_STATE_NEW = 0,154FW_STATE_IN_PROGRESS,155FW_STATE_VERIFY,156FW_STATE_UPDATED,157};158159struct nd_intel_fw_info {160__u32 status;161__u32 storage_size;162__u32 max_send_len;163__u32 query_interval;164__u32 max_query_time;165__u8 update_cap;166__u8 reserved[3];167__u32 fis_version;168__u64 run_version;169__u64 updated_version;170} __packed;171172struct nd_intel_fw_start {173__u32 status;174__u32 context;175} __packed;176177/* this one has the output first because the variable input data size */178struct nd_intel_fw_send_data {179__u32 context;180__u32 offset;181__u32 length;182__u8 data[];183/* this field is not declared due ot variable data from input */184/* __u32 status; */185} __packed;186187struct nd_intel_fw_finish_update {188__u8 ctrl_flags;189__u8 reserved[3];190__u32 context;191__u32 status;192} __packed;193194struct nd_intel_fw_finish_query {195__u32 context;196__u32 status;197__u64 updated_fw_rev;198} __packed;199200struct nd_intel_lss {201__u8 enable;202__u32 status;203} __packed;204205typedef struct nfit_test_resource *(*nfit_test_lookup_fn)(resource_size_t);206typedef union acpi_object *(*nfit_test_evaluate_dsm_fn)(acpi_handle handle,207const guid_t *guid, u64 rev, u64 func,208union acpi_object *argv4);209void __iomem *__wrap_devm_ioremap(struct device *dev,210resource_size_t offset, unsigned long size);211void *__wrap_devm_memremap(struct device *dev, resource_size_t offset,212size_t size, unsigned long flags);213void *__wrap_devm_memremap_pages(struct device *dev, struct dev_pagemap *pgmap);214void *__wrap_memremap(resource_size_t offset, size_t size,215unsigned long flags);216void __wrap_devm_memunmap(struct device *dev, void *addr);217void __iomem *__wrap_ioremap(resource_size_t offset, unsigned long size);218void __iomem *__wrap_ioremap_wc(resource_size_t offset, unsigned long size);219void __wrap_iounmap(volatile void __iomem *addr);220void __wrap_memunmap(void *addr);221struct resource *__wrap___request_region(struct resource *parent,222resource_size_t start, resource_size_t n, const char *name,223int flags);224int __wrap_insert_resource(struct resource *parent, struct resource *res);225int __wrap_remove_resource(struct resource *res);226struct resource *__wrap___devm_request_region(struct device *dev,227struct resource *parent, resource_size_t start,228resource_size_t n, const char *name);229void __wrap___release_region(struct resource *parent, resource_size_t start,230resource_size_t n);231void __wrap___devm_release_region(struct device *dev, struct resource *parent,232resource_size_t start, resource_size_t n);233acpi_status __wrap_acpi_evaluate_object(acpi_handle handle, acpi_string path,234struct acpi_object_list *p, struct acpi_buffer *buf);235union acpi_object * __wrap_acpi_evaluate_dsm(acpi_handle handle, const guid_t *guid,236u64 rev, u64 func, union acpi_object *argv4);237238void nfit_test_setup(nfit_test_lookup_fn lookup,239nfit_test_evaluate_dsm_fn evaluate);240void nfit_test_teardown(void);241struct nfit_test_resource *get_nfit_res(resource_size_t resource);242#endif243244245