Path: blob/master/tools/testing/selftests/kvm/arm64/hypercalls.c
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// SPDX-License-Identifier: GPL-2.0-only12/* hypercalls: Check the ARM64's psuedo-firmware bitmap register interface.3*4* The test validates the basic hypercall functionalities that are exposed5* via the psuedo-firmware bitmap register. This includes the registers'6* read/write behavior before and after the VM has started, and if the7* hypercalls are properly masked or unmasked to the guest when disabled or8* enabled from the KVM userspace, respectively.9*/10#include <errno.h>11#include <linux/arm-smccc.h>12#include <asm/kvm.h>13#include <kvm_util.h>1415#include "processor.h"1617#define FW_REG_ULIMIT_VAL(max_feat_bit) (GENMASK(max_feat_bit, 0))1819/* Last valid bits of the bitmapped firmware registers */20#define KVM_REG_ARM_STD_BMAP_BIT_MAX 021#define KVM_REG_ARM_STD_HYP_BMAP_BIT_MAX 022#define KVM_REG_ARM_VENDOR_HYP_BMAP_BIT_MAX 123#define KVM_REG_ARM_VENDOR_HYP_BMAP_2_BIT_MAX 12425#define KVM_REG_ARM_STD_BMAP_RESET_VAL FW_REG_ULIMIT_VAL(KVM_REG_ARM_STD_BMAP_BIT_MAX)26#define KVM_REG_ARM_STD_HYP_BMAP_RESET_VAL FW_REG_ULIMIT_VAL(KVM_REG_ARM_STD_HYP_BMAP_BIT_MAX)27#define KVM_REG_ARM_VENDOR_HYP_BMAP_RESET_VAL FW_REG_ULIMIT_VAL(KVM_REG_ARM_VENDOR_HYP_BMAP_BIT_MAX)28#define KVM_REG_ARM_VENDOR_HYP_BMAP_2_RESET_VAL 02930struct kvm_fw_reg_info {31uint64_t reg; /* Register definition */32uint64_t max_feat_bit; /* Bit that represents the upper limit of the feature-map */33uint64_t reset_val; /* Reset value for the register */34};3536#define FW_REG_INFO(r) \37{ \38.reg = r, \39.max_feat_bit = r##_BIT_MAX, \40.reset_val = r##_RESET_VAL \41}4243static const struct kvm_fw_reg_info fw_reg_info[] = {44FW_REG_INFO(KVM_REG_ARM_STD_BMAP),45FW_REG_INFO(KVM_REG_ARM_STD_HYP_BMAP),46FW_REG_INFO(KVM_REG_ARM_VENDOR_HYP_BMAP),47FW_REG_INFO(KVM_REG_ARM_VENDOR_HYP_BMAP_2),48};4950enum test_stage {51TEST_STAGE_REG_IFACE,52TEST_STAGE_HVC_IFACE_FEAT_DISABLED,53TEST_STAGE_HVC_IFACE_FEAT_ENABLED,54TEST_STAGE_HVC_IFACE_FALSE_INFO,55TEST_STAGE_END,56};5758static int stage = TEST_STAGE_REG_IFACE;5960struct test_hvc_info {61uint32_t func_id;62uint64_t arg1;63};6465#define TEST_HVC_INFO(f, a1) \66{ \67.func_id = f, \68.arg1 = a1, \69}7071static const struct test_hvc_info hvc_info[] = {72/* KVM_REG_ARM_STD_BMAP */73TEST_HVC_INFO(ARM_SMCCC_TRNG_VERSION, 0),74TEST_HVC_INFO(ARM_SMCCC_TRNG_FEATURES, ARM_SMCCC_TRNG_RND64),75TEST_HVC_INFO(ARM_SMCCC_TRNG_GET_UUID, 0),76TEST_HVC_INFO(ARM_SMCCC_TRNG_RND32, 0),77TEST_HVC_INFO(ARM_SMCCC_TRNG_RND64, 0),7879/* KVM_REG_ARM_STD_HYP_BMAP */80TEST_HVC_INFO(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_HV_PV_TIME_FEATURES),81TEST_HVC_INFO(ARM_SMCCC_HV_PV_TIME_FEATURES, ARM_SMCCC_HV_PV_TIME_ST),82TEST_HVC_INFO(ARM_SMCCC_HV_PV_TIME_ST, 0),8384/* KVM_REG_ARM_VENDOR_HYP_BMAP */85TEST_HVC_INFO(ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID,86ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID),87TEST_HVC_INFO(ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID, 0),88TEST_HVC_INFO(ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID, KVM_PTP_VIRT_COUNTER),89};9091/* Feed false hypercall info to test the KVM behavior */92static const struct test_hvc_info false_hvc_info[] = {93/* Feature support check against a different family of hypercalls */94TEST_HVC_INFO(ARM_SMCCC_TRNG_FEATURES, ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID),95TEST_HVC_INFO(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_TRNG_RND64),96TEST_HVC_INFO(ARM_SMCCC_HV_PV_TIME_FEATURES, ARM_SMCCC_TRNG_RND64),97};9899static void guest_test_hvc(const struct test_hvc_info *hc_info)100{101unsigned int i;102struct arm_smccc_res res;103unsigned int hvc_info_arr_sz;104105hvc_info_arr_sz =106hc_info == hvc_info ? ARRAY_SIZE(hvc_info) : ARRAY_SIZE(false_hvc_info);107108for (i = 0; i < hvc_info_arr_sz; i++, hc_info++) {109memset(&res, 0, sizeof(res));110do_smccc(hc_info->func_id, hc_info->arg1, 0, 0, 0, 0, 0, 0, &res);111112switch (stage) {113case TEST_STAGE_HVC_IFACE_FEAT_DISABLED:114case TEST_STAGE_HVC_IFACE_FALSE_INFO:115__GUEST_ASSERT(res.a0 == SMCCC_RET_NOT_SUPPORTED,116"a0 = 0x%lx, func_id = 0x%x, arg1 = 0x%lx, stage = %u",117res.a0, hc_info->func_id, hc_info->arg1, stage);118break;119case TEST_STAGE_HVC_IFACE_FEAT_ENABLED:120__GUEST_ASSERT(res.a0 != SMCCC_RET_NOT_SUPPORTED,121"a0 = 0x%lx, func_id = 0x%x, arg1 = 0x%lx, stage = %u",122res.a0, hc_info->func_id, hc_info->arg1, stage);123break;124default:125GUEST_FAIL("Unexpected stage = %u", stage);126}127}128}129130static void guest_code(void)131{132while (stage != TEST_STAGE_END) {133switch (stage) {134case TEST_STAGE_REG_IFACE:135break;136case TEST_STAGE_HVC_IFACE_FEAT_DISABLED:137case TEST_STAGE_HVC_IFACE_FEAT_ENABLED:138guest_test_hvc(hvc_info);139break;140case TEST_STAGE_HVC_IFACE_FALSE_INFO:141guest_test_hvc(false_hvc_info);142break;143default:144GUEST_FAIL("Unexpected stage = %u", stage);145}146147GUEST_SYNC(stage);148}149150GUEST_DONE();151}152153struct st_time {154uint32_t rev;155uint32_t attr;156uint64_t st_time;157};158159#define STEAL_TIME_SIZE ((sizeof(struct st_time) + 63) & ~63)160#define ST_GPA_BASE (1 << 30)161162static void steal_time_init(struct kvm_vcpu *vcpu)163{164uint64_t st_ipa = (ulong)ST_GPA_BASE;165unsigned int gpages;166167gpages = vm_calc_num_guest_pages(VM_MODE_DEFAULT, STEAL_TIME_SIZE);168vm_userspace_mem_region_add(vcpu->vm, VM_MEM_SRC_ANONYMOUS, ST_GPA_BASE, 1, gpages, 0);169170vcpu_device_attr_set(vcpu, KVM_ARM_VCPU_PVTIME_CTRL,171KVM_ARM_VCPU_PVTIME_IPA, &st_ipa);172}173174static void test_fw_regs_before_vm_start(struct kvm_vcpu *vcpu)175{176uint64_t val;177unsigned int i;178int ret;179180for (i = 0; i < ARRAY_SIZE(fw_reg_info); i++) {181const struct kvm_fw_reg_info *reg_info = &fw_reg_info[i];182uint64_t set_val;183184/* First 'read' should be the reset value for the reg */185val = vcpu_get_reg(vcpu, reg_info->reg);186TEST_ASSERT(val == reg_info->reset_val,187"Unexpected reset value for reg: 0x%lx; expected: 0x%lx; read: 0x%lx",188reg_info->reg, reg_info->reset_val, val);189190if (reg_info->reset_val)191set_val = 0;192else193set_val = FW_REG_ULIMIT_VAL(reg_info->max_feat_bit);194195ret = __vcpu_set_reg(vcpu, reg_info->reg, set_val);196TEST_ASSERT(ret == 0,197"Failed to %s all the features of reg: 0x%lx; ret: %d",198(set_val ? "set" : "clear"), reg_info->reg, errno);199200val = vcpu_get_reg(vcpu, reg_info->reg);201TEST_ASSERT(val == set_val,202"Expected all the features to be %s for reg: 0x%lx",203(set_val ? "set" : "cleared"), reg_info->reg);204205/*206* If the reg has been set, clear it as test_fw_regs_after_vm_start()207* expects it to be cleared.208*/209if (set_val) {210ret = __vcpu_set_reg(vcpu, reg_info->reg, 0);211TEST_ASSERT(ret == 0,212"Failed to clear all the features of reg: 0x%lx; ret: %d",213reg_info->reg, errno);214}215216/*217* Test enabling a feature that's not supported.218* Avoid this check if all the bits are occupied.219*/220if (reg_info->max_feat_bit < 63) {221ret = __vcpu_set_reg(vcpu, reg_info->reg, BIT(reg_info->max_feat_bit + 1));222TEST_ASSERT(ret != 0 && errno == EINVAL,223"Unexpected behavior or return value (%d) while setting an unsupported feature for reg: 0x%lx",224errno, reg_info->reg);225}226}227}228229static void test_fw_regs_after_vm_start(struct kvm_vcpu *vcpu)230{231uint64_t val;232unsigned int i;233int ret;234235for (i = 0; i < ARRAY_SIZE(fw_reg_info); i++) {236const struct kvm_fw_reg_info *reg_info = &fw_reg_info[i];237238/*239* Before starting the VM, the test clears all the bits.240* Check if that's still the case.241*/242val = vcpu_get_reg(vcpu, reg_info->reg);243TEST_ASSERT(val == 0,244"Expected all the features to be cleared for reg: 0x%lx",245reg_info->reg);246247/*248* Since the VM has run at least once, KVM shouldn't allow modification of249* the registers and should return EBUSY. Set the registers and check for250* the expected errno.251*/252ret = __vcpu_set_reg(vcpu, reg_info->reg, FW_REG_ULIMIT_VAL(reg_info->max_feat_bit));253TEST_ASSERT(ret != 0 && errno == EBUSY,254"Unexpected behavior or return value (%d) while setting a feature while VM is running for reg: 0x%lx",255errno, reg_info->reg);256}257}258259static struct kvm_vm *test_vm_create(struct kvm_vcpu **vcpu)260{261struct kvm_vm *vm;262263vm = vm_create_with_one_vcpu(vcpu, guest_code);264265steal_time_init(*vcpu);266267return vm;268}269270static void test_guest_stage(struct kvm_vm **vm, struct kvm_vcpu **vcpu)271{272int prev_stage = stage;273274pr_debug("Stage: %d\n", prev_stage);275276/* Sync the stage early, the VM might be freed below. */277stage++;278sync_global_to_guest(*vm, stage);279280switch (prev_stage) {281case TEST_STAGE_REG_IFACE:282test_fw_regs_after_vm_start(*vcpu);283break;284case TEST_STAGE_HVC_IFACE_FEAT_DISABLED:285/* Start a new VM so that all the features are now enabled by default */286kvm_vm_free(*vm);287*vm = test_vm_create(vcpu);288break;289case TEST_STAGE_HVC_IFACE_FEAT_ENABLED:290case TEST_STAGE_HVC_IFACE_FALSE_INFO:291break;292default:293TEST_FAIL("Unknown test stage: %d", prev_stage);294}295}296297static void test_run(void)298{299struct kvm_vcpu *vcpu;300struct kvm_vm *vm;301struct ucall uc;302bool guest_done = false;303304vm = test_vm_create(&vcpu);305306test_fw_regs_before_vm_start(vcpu);307308while (!guest_done) {309vcpu_run(vcpu);310311switch (get_ucall(vcpu, &uc)) {312case UCALL_SYNC:313test_guest_stage(&vm, &vcpu);314break;315case UCALL_DONE:316guest_done = true;317break;318case UCALL_ABORT:319REPORT_GUEST_ASSERT(uc);320break;321default:322TEST_FAIL("Unexpected guest exit");323}324}325326kvm_vm_free(vm);327}328329int main(void)330{331test_run();332return 0;333}334335336