//===-- llvm/MC/MCInstrDesc.h - Instruction Descriptors -*- C++ -*-===//1//2// The LLVM Compiler Infrastructure3//4// This file is distributed under the University of Illinois Open Source5// License. See LICENSE.TXT for details.6//7//===----------------------------------------------------------------------===//8//9// This file defines the MCOperandInfo and MCInstrDesc classes, which10// are used to describe target instructions and their operands.11//12//===----------------------------------------------------------------------===//1314/* Capstone Disassembly Engine */15/* By Nguyen Anh Quynh <[email protected]>, 2013-2019 */1617#ifndef CS_LLVM_MC_MCINSTRDESC_H18#define CS_LLVM_MC_MCINSTRDESC_H1920#include "MCRegisterInfo.h"21#include "capstone/platform.h"2223//===----------------------------------------------------------------------===//24// Machine Operand Flags and Description25//===----------------------------------------------------------------------===//2627/// Operand constraints. These are encoded in 16 bits with one of the28/// low-order 3 bits specifying that a constraint is present and the29/// corresponding high-order hex digit specifying the constraint value.30/// This allows for a maximum of 3 constraints.31typedef enum {32MCOI_TIED_TO = 0, // Operand tied to another operand.33MCOI_EARLY_CLOBBER // Operand is an early clobber register operand34} MCOI_OperandConstraint;3536// Define a macro to produce each constraint value.37#define CONSTRAINT_MCOI_TIED_TO(op) \38((1 << MCOI_TIED_TO) | ((op) << (4 + MCOI_TIED_TO * 4)))3940#define CONSTRAINT_MCOI_EARLY_CLOBBER \41(1 << MCOI_EARLY_CLOBBER)4243/// OperandFlags - These are flags set on operands, but should be considered44/// private, all access should go through the MCOperandInfo accessors.45/// See the accessors for a description of what these are.46enum MCOI_OperandFlags {47MCOI_LookupPtrRegClass = 0,48MCOI_Predicate,49MCOI_OptionalDef50};5152/// Operand Type - Operands are tagged with one of the values of this enum.53enum MCOI_OperandType {54MCOI_OPERAND_UNKNOWN = 0,55MCOI_OPERAND_IMMEDIATE = 1,56MCOI_OPERAND_REGISTER = 2,57MCOI_OPERAND_MEMORY = 3,58MCOI_OPERAND_PCREL = 4,5960MCOI_OPERAND_FIRST_GENERIC = 6,61MCOI_OPERAND_GENERIC_0 = 6,62MCOI_OPERAND_GENERIC_1 = 7,63MCOI_OPERAND_GENERIC_2 = 8,64MCOI_OPERAND_GENERIC_3 = 9,65MCOI_OPERAND_GENERIC_4 = 10,66MCOI_OPERAND_GENERIC_5 = 11,67MCOI_OPERAND_LAST_GENERIC = 11,6869MCOI_OPERAND_FIRST_GENERIC_IMM = 12,70MCOI_OPERAND_GENERIC_IMM_0 = 12,71MCOI_OPERAND_LAST_GENERIC_IMM = 12,7273MCOI_OPERAND_FIRST_TARGET = 13,74};757677/// MCOperandInfo - This holds information about one operand of a machine78/// instruction, indicating the register class for register operands, etc.79///80typedef struct MCOperandInfo {81/// This specifies the register class enumeration of the operand82/// if the operand is a register. If isLookupPtrRegClass is set, then this is83/// an index that is passed to TargetRegisterInfo::getPointerRegClass(x) to84/// get a dynamic register class.85int16_t RegClass;8687/// These are flags from the MCOI::OperandFlags enum.88uint8_t Flags;8990/// Information about the type of the operand.91uint8_t OperandType;9293/// The lower 16 bits are used to specify which constraints are set.94/// The higher 16 bits are used to specify the value of constraints (4 bits each).95uint32_t Constraints;96/// Currently no other information.97} MCOperandInfo;9899100//===----------------------------------------------------------------------===//101// Machine Instruction Flags and Description102//===----------------------------------------------------------------------===//103104/// MCInstrDesc flags - These should be considered private to the105/// implementation of the MCInstrDesc class. Clients should use the predicate106/// methods on MCInstrDesc, not use these directly. These all correspond to107/// bitfields in the MCInstrDesc::Flags field.108enum {109MCID_Variadic = 0,110MCID_HasOptionalDef,111MCID_Pseudo,112MCID_Return,113MCID_Call,114MCID_Barrier,115MCID_Terminator,116MCID_Branch,117MCID_IndirectBranch,118MCID_Compare,119MCID_MoveImm,120MCID_MoveReg,121MCID_Bitcast,122MCID_Select,123MCID_DelaySlot,124MCID_FoldableAsLoad,125MCID_MayLoad,126MCID_MayStore,127MCID_Predicable,128MCID_NotDuplicable,129MCID_UnmodeledSideEffects,130MCID_Commutable,131MCID_ConvertibleTo3Addr,132MCID_UsesCustomInserter,133MCID_HasPostISelHook,134MCID_Rematerializable,135MCID_CheapAsAMove,136MCID_ExtraSrcRegAllocReq,137MCID_ExtraDefRegAllocReq,138MCID_RegSequence,139MCID_ExtractSubreg,140MCID_InsertSubreg,141MCID_Convergent,142MCID_Add,143MCID_Trap,144};145146/// MCInstrDesc - Describe properties that are true of each instruction in the147/// target description file. This captures information about side effects,148/// register use and many other things. There is one instance of this struct149/// for each target instruction class, and the MachineInstr class points to150/// this struct directly to describe itself.151typedef struct MCInstrDesc {152unsigned char NumOperands; // Num of args (may be more if variable_ops)153const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands154} MCInstrDesc;155156bool MCOperandInfo_isPredicate(const MCOperandInfo *m);157158bool MCOperandInfo_isOptionalDef(const MCOperandInfo *m);159160bool MCOperandInfo_isTiedToOp(const MCOperandInfo *m);161162int MCOperandInfo_getOperandConstraint(const MCInstrDesc *OpInfo,163unsigned OpNum,164MCOI_OperandConstraint Constraint);165166#endif167168169