/***************************************************************************************1* Genesis Plus2* XE-A1P analog controller support3*4* Copyright (C) 2011-2013 Eke-Eke (Genesis Plus GX)5*6* Redistribution and use of this code or any derivative works are permitted7* provided that the following conditions are met:8*9* - Redistributions may not be sold, nor may they be used in a commercial10* product or activity.11*12* - Redistributions that are modified from the original source must include the13* complete source code, including the source code for all components used by a14* binary built from the modified sources. However, as a special exception, the15* source code distributed need not include anything that is normally distributed16* (in either source or binary form) with the major components (compiler, kernel,17* and so on) of the operating system on which the executable runs, unless that18* component itself accompanies the executable.19*20* - Redistributions must reproduce the above copyright notice, this list of21* conditions and the following disclaimer in the documentation and/or other22* materials provided with the distribution.23*24* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"25* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE26* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE27* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE28* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR29* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF30* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS31* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN32* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)33* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE34* POSSIBILITY OF SUCH DAMAGE.35*36****************************************************************************************/3738#include "shared.h"3940struct41{42uint8 State;43uint8 Counter;44uint8 Latency;45} xe_a1p[2];4647void xe_a1p_reset(int index)48{49input.analog[index][0] = 128;50input.analog[index][1] = 128;51input.analog[index+1][0] = 128;52index >>= 2;53xe_a1p[index].State = 0x40;54xe_a1p[index].Counter = 0;55xe_a1p[index].Latency = 0;56}5758INLINE unsigned char xe_a1p_read(int index)59{60unsigned int temp = 0x40;61unsigned int port = index << 2;6263/* Left Stick X & Y analog values (bidirectional) */64int x = input.analog[port][0];65int y = input.analog[port][1];6667/* Right Stick X or Y value (unidirectional) */68int z = input.analog[port+1][0];6970/* Buttons status (active low) */71uint16 pad = ~input.pad[port];7273/* Current internal cycle (0-7) */74unsigned int cycle = xe_a1p[index].Counter & 7;7576/* Current 4-bit data cycle */77/* There are eight internal data cycle for each 5 acquisition sequence */78/* First 4 return the same 4-bit data, next 4 return next 4-bit data */79switch (xe_a1p[index].Counter >> 2)80{81case 0:82temp |= ((pad >> 8) & 0x0F); /* E1 E2 Start Select */83break;84case 1:85temp |= ((pad >> 4) & 0x0F); /* A B C D */86break;87case 2:88temp |= ((x >> 4) & 0x0F);89break;90case 3:91temp |= ((y >> 4) & 0x0F);92break;93case 4:94break;95case 5:96temp |= ((z >> 4) & 0x0F);97break;98case 6:99temp |= (x & 0x0F);100break;101case 7:102temp |= (y & 0x0F);103break;104case 8:105break;106case 9:107temp |= (z & 0x0F);108break;109}110111/* TL indicates which part of data is returned (0=1st part, 1=2nd part) */112temp |= ((cycle & 4) << 2);113114/* TR indicates if data is ready (0=ready, 1=not ready) */115/* Fastest One input routine actually expects this bit to switch between 0 & 1 */116/* so we make the first read of a data cycle return 1 then 0 for remaining reads */117temp |= (!(cycle & 3) << 5);118119/* Automatically increment data cycle on each read (within current acquisition sequence) */120cycle = (cycle + 1) & 7;121122/* Update internal cycle counter */123xe_a1p[index].Counter = (xe_a1p[index].Counter & ~7) | cycle;124125/* Update internal latency on each read */126xe_a1p[index].Latency++;127128return temp;129}130131INLINE void xe_a1p_write(int index, unsigned char data, unsigned char mask)132{133/* update bits set as output only */134data = (xe_a1p[index].State & ~mask) | (data & mask);135136/* look for TH 1->0 transitions */137if (!(data & 0x40) && (xe_a1p[index].State & 0x40))138{139/* reset acquisition cycle */140xe_a1p[index].Latency = xe_a1p[index].Counter = 0;141}142else143{144/* some games immediately write new data to TH */145/* so we make sure first sequence has actually been handled */146if (xe_a1p[index].Latency > 2)147{148/* next acquisition sequence */149xe_a1p[index].Counter = (xe_a1p[index].Counter & ~7) + 8;150151/* 5 sequence max with 8 cycles each */152if (xe_a1p[index].Counter > 32)153{154xe_a1p[index].Counter = 32;155}156}157}158159/* update internal state */160xe_a1p[index].State = data;161}162163unsigned char xe_a1p_1_read(void)164{165return xe_a1p_read(0);166}167168unsigned char xe_a1p_2_read(void)169{170return xe_a1p_read(1);171}172173void xe_a1p_1_write(unsigned char data, unsigned char mask)174{175xe_a1p_write(0, data, mask);176}177178void xe_a1p_2_write(unsigned char data, unsigned char mask)179{180xe_a1p_write(1, data, mask);181}182183184