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alexbevi
GitHub Repository: alexbevi/BizHawk
 Path: blob/master/libsnes/bsnes/snes/alt/ppu-compatibility/mmio/mmio.hpp
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struct {

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  //open bus support

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  uint8 ppu1_mdr, ppu2_mdr;

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  //bg line counters

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  uint16 bg_y[4];

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  //internal state

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  uint16 ioamaddr;

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  uint16 icgramaddr;

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  //$2100

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  bool   display_disabled;

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  uint8  display_brightness;

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  //$2101

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  uint8  oam_basesize;

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  uint8  oam_nameselect;

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  uint16 oam_tdaddr;

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  //$2102-$2103

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  uint16 oam_baseaddr;

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  uint16 oam_addr;

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  bool   oam_priority;

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  uint8  oam_firstsprite;

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  //$2104

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  uint8  oam_latchdata;

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  //$2105

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  bool   bg_tilesize[4];

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  bool   bg3_priority;

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  uint8  bg_mode;

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  //$2106

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  uint8  mosaic_size;

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  bool   mosaic_enabled[4];

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  uint16 mosaic_countdown;

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  //$2107-$210a

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  uint16 bg_scaddr[4];

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  uint8  bg_scsize[4];

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  //$210b-$210c

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  uint16 bg_tdaddr[4];

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  //$210d-$2114

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  uint8  bg_ofslatch;

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  uint16 m7_hofs, m7_vofs;

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  uint16 bg_hofs[4];

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  uint16 bg_vofs[4];

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  //$2115

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  bool   vram_incmode;

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  uint8  vram_mapping;

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  uint8  vram_incsize;

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  //$2116-$2117

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  uint16 vram_addr;

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  //$211a

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  uint8  mode7_repeat;

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  bool   mode7_vflip;

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  bool   mode7_hflip;

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  //$211b-$2120

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  uint8  m7_latch;

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  uint16 m7a, m7b, m7c, m7d, m7x, m7y;

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  //$2121

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  uint16 cgram_addr;

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  //$2122

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  uint8  cgram_latchdata;

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  //$2123-$2125

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  bool   window1_enabled[6];

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  bool   window1_invert [6];

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  bool   window2_enabled[6];

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  bool   window2_invert [6];

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  //$2126-$2129

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  uint8  window1_left, window1_right;

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  uint8  window2_left, window2_right;

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  //$212a-$212b

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  uint8  window_mask[6];

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  //$212c-$212d

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  bool   bg_enabled[5], bgsub_enabled[5];

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  //$212e-$212f

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  bool   window_enabled[5], sub_window_enabled[5];

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  //$2130

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  uint8  color_mask, colorsub_mask;

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  bool   addsub_mode;

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  bool   direct_color;

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  //$2131

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  bool   color_mode, color_halve;

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  bool   color_enabled[6];

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  //$2132

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  uint8  color_r, color_g, color_b;

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  uint16 color_rgb;

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  //$2133

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  //overscan and interlace are checked once per frame to

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  //determine if entire frame should be interlaced/non-interlace

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  //and overscan adjusted. therefore, the variables act sort of

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  //like a buffer, but they do still affect internal rendering

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  bool   mode7_extbg;

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  bool   pseudo_hires;

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  bool   overscan;

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  uint16 scanlines;

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  bool   oam_interlace;

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  bool   interlace;

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  //$2137

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  uint16 hcounter, vcounter;

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  bool   latch_hcounter, latch_vcounter;

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  bool   counters_latched;

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  //$2139-$213a

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  uint16 vram_readbuffer;

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  //$213e

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  bool   time_over, range_over;

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  uint16 oam_itemcount, oam_tilecount;

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} regs;

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void mmio_w2100(uint8 value);  //INIDISP

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void mmio_w2101(uint8 value);  //OBSEL

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void mmio_w2102(uint8 value);  //OAMADDL

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void mmio_w2103(uint8 value);  //OAMADDH

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void mmio_w2104(uint8 value);  //OAMDATA

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void mmio_w2105(uint8 value);  //BGMODE

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void mmio_w2106(uint8 value);  //MOSAIC

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void mmio_w2107(uint8 value);  //BG1SC

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void mmio_w2108(uint8 value);  //BG2SC

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void mmio_w2109(uint8 value);  //BG3SC

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void mmio_w210a(uint8 value);  //BG4SC

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void mmio_w210b(uint8 value);  //BG12NBA

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void mmio_w210c(uint8 value);  //BG34NBA

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void mmio_w210d(uint8 value);  //BG1HOFS

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void mmio_w210e(uint8 value);  //BG1VOFS

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void mmio_w210f(uint8 value);  //BG2HOFS

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void mmio_w2110(uint8 value);  //BG2VOFS

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void mmio_w2111(uint8 value);  //BG3HOFS

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void mmio_w2112(uint8 value);  //BG3VOFS

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void mmio_w2113(uint8 value);  //BG4HOFS

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void mmio_w2114(uint8 value);  //BG4VOFS

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void mmio_w2115(uint8 value);  //VMAIN

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void mmio_w2116(uint8 value);  //VMADDL

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void mmio_w2117(uint8 value);  //VMADDH

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void mmio_w2118(uint8 value);  //VMDATAL

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void mmio_w2119(uint8 value);  //VMDATAH

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void mmio_w211a(uint8 value);  //M7SEL

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void mmio_w211b(uint8 value);  //M7A

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void mmio_w211c(uint8 value);  //M7B

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void mmio_w211d(uint8 value);  //M7C

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void mmio_w211e(uint8 value);  //M7D

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void mmio_w211f(uint8 value);  //M7X

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void mmio_w2120(uint8 value);  //M7Y

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void mmio_w2121(uint8 value);  //CGADD

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void mmio_w2122(uint8 value);  //CGDATA

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void mmio_w2123(uint8 value);  //W12SEL

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void mmio_w2124(uint8 value);  //W34SEL

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void mmio_w2125(uint8 value);  //WOBJSEL

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void mmio_w2126(uint8 value);  //WH0

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void mmio_w2127(uint8 value);  //WH1

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void mmio_w2128(uint8 value);  //WH2

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void mmio_w2129(uint8 value);  //WH3

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void mmio_w212a(uint8 value);  //WBGLOG

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void mmio_w212b(uint8 value);  //WOBJLOG

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void mmio_w212c(uint8 value);  //TM

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void mmio_w212d(uint8 value);  //TS

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void mmio_w212e(uint8 value);  //TMW

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void mmio_w212f(uint8 value);  //TSW

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void mmio_w2130(uint8 value);  //CGWSEL

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void mmio_w2131(uint8 value);  //CGADDSUB

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void mmio_w2132(uint8 value);  //COLDATA

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void mmio_w2133(uint8 value);  //SETINI

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uint8 mmio_r2134();  //MPYL

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uint8 mmio_r2135();  //MPYM

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uint8 mmio_r2136();  //MPYH

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uint8 mmio_r2137();  //SLHV

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uint8 mmio_r2138();  //OAMDATAREAD

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uint8 mmio_r2139();  //VMDATALREAD

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uint8 mmio_r213a();  //VMDATAHREAD

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uint8 mmio_r213b();  //CGDATAREAD

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uint8 mmio_r213c();  //OPHCT

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uint8 mmio_r213d();  //OPVCT

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uint8 mmio_r213e();  //STAT77

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uint8 mmio_r213f();  //STAT78

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uint8 mmio_read(unsigned addr);

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void mmio_write(unsigned addr, uint8 data);

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void latch_counters();

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