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alexbevi
GitHub Repository: alexbevi/BizHawk
Path: blob/master/libsnes/bsnes/snes/chip/armdsp/registers.hpp
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//Exceptions:
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//00000000 = reset
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//00000004 = undefined instruction
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//00000008 = software interrupt
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//0000000c = prefetch abort
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//00000010 = data abort
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//00000018 = IRQ (interrupt)
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//0000001c = FIQ (fast interrupt)
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struct Bridge {
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struct Buffer {
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bool ready;
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uint8 data;
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};
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Buffer cputoarm;
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Buffer armtocpu;
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uint32 timer;
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uint32 timerlatch;
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bool reset;
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bool ready;
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bool busy;
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uint8 status() const {
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return (ready << 7) | (cputoarm.ready << 3) | (busy << 2) | (armtocpu.ready << 0);
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}
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} bridge;
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struct PSR {
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bool n;
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bool z;
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bool c;
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bool v;
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bool i;
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bool f;
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uint5 m;
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uint32 getf() const {
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return (n << 31) | (z << 30) | (c << 29) | (v << 28);
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}
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uint32 gets() const {
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return 0u;
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}
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uint32 getx() const {
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return 0u;
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}
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uint32 getc() const {
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return (i << 7) | (f << 6) | (m << 0);
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}
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void setf(uint32 data) {
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n = data & 0x80000000;
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z = data & 0x40000000;
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c = data & 0x20000000;
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v = data & 0x10000000;
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}
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void sets(uint32 data) {
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}
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void setx(uint32 data) {
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}
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void setc(uint32 data) {
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i = data & 0x00000080;
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f = data & 0x00000040;
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m = data & 0x0000001f;
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}
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operator uint32() const {
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return getf() | gets() | getx() | getc();
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}
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PSR& operator=(uint32 data) {
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setf(data), sets(data), setx(data), setc(data);
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return *this;
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}
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} cpsr, spsr;
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//r13 = SP (stack pointer)
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//r14 = LR (link register)
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//r15 = PC (program counter)
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struct Register {
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uint32 data;
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function<void ()> write;
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operator unsigned() const {
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return data;
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}
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Register& operator=(uint32 n) {
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data = n;
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if(write) write();
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return *this;
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}
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Register& operator+=(uint32 n) { return operator=(data + n); }
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Register& operator-=(uint32 n) { return operator=(data - n); }
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Register& operator&=(uint32 n) { return operator=(data & n); }
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Register& operator|=(uint32 n) { return operator=(data | n); }
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Register& operator^=(uint32 n) { return operator=(data ^ n); }
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void step() {
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data += 4;
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}
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} r[16];
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bool shiftercarry;
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uint32 instruction;
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bool exception;
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struct Pipeline {
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bool reload;
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struct Instruction {
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uint32 opcode;
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uint32 address;
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};
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Instruction instruction;
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Instruction prefetch;
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Instruction mdr;
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} pipeline;
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