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alexbevi
GitHub Repository: alexbevi/BizHawk
Path: blob/master/libsnes/bsnes/snes/controller/usart/usart.cpp
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#ifdef CONTROLLER_CPP
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//Synchronous serial communications cable emulation
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//Hardware:
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//Teensy++ 2.0 USB
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//AT90USB1286
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//Connection Diagram:
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//[SNES] [Teensy]
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// +5v ---
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// Clock D5
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// Latch D2
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// Data1 D3
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// Data2 ---
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// IOBit ---
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// GND GND
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void USART::enter() {
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if(init && main) {
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init({ &USART::usleep, this }, { &USART::read, this }, { &USART::write, this });
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main();
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}
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while(true) step(1000000); //fallback; main should never return
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}
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void USART::usleep(unsigned milliseconds) {
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step(milliseconds);
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}
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//SNES -> USART
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uint8 USART::read() {
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while(txbuffer.size() == 0) step(1);
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uint8 data = txbuffer[0];
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txbuffer.remove(0);
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return data;
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}
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//USART -> SNES
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void USART::write(uint8 data) {
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rxbuffer.append(data ^ 0xff);
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}
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//clock
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uint2 USART::data() {
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//SNES -> USART
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if(txlength == 0) {
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if(latched == 0) txlength++;
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} else if(txlength <= 8) {
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txdata = (latched << 7) | (txdata >> 1);
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txlength++;
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} else {
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if(latched == 1) txbuffer.append(txdata);
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txlength = 0;
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}
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//USART -> SNES
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if(rxlength == 0 && rxbuffer.size()) {
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data1 = 1;
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rxdata = rxbuffer[0];
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rxbuffer.remove(0);
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rxlength++;
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} else if(rxlength <= 8) {
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data1 = rxdata & 1;
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rxdata >>= 1;
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rxlength++;
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} else {
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data1 = 0;
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rxlength = 0;
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}
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return (data2 << 1) | (data1 << 0);
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}
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//latch
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void USART::latch(bool data) {
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latched = data;
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}
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USART::USART(bool port) : Controller(port) {
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latched = 0;
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data1 = 0;
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data2 = 0;
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rxlength = 0;
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rxdata = 0;
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txlength = 0;
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txdata = 0;
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string filename = interface()->path(Cartridge::Slot::Base, "usart.so");
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if(open_absolute(filename)) {
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init = sym("usart_init");
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main = sym("usart_main");
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if(init && main) create(Controller::Enter, 1000000);
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}
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}
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USART::~USART() {
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if(opened()) close();
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}
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#endif
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