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alexbevi
GitHub Repository: alexbevi/BizHawk
Path: blob/master/waterbox/gpgx/core/sound/ym2413.c
2 views
1
/*
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**
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** File: ym2413.c - software implementation of YM2413
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** FM sound generator type OPLL
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**
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** Copyright (C) 2002 Jarek Burczynski
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**
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** Version 1.0
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**
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**
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to do:
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- make sure of the sinus amplitude bits
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- make sure of the EG resolution bits (looks like the biggest
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modulation index generated by the modulator is 123, 124 = no modulation)
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- find proper algorithm for attack phase of EG
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- tune up instruments ROM
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- support sample replay in test mode (it is NOT as simple as setting bit 0
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in register 0x0f and using register 0x10 for sample data).
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Which games use this feature ?
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*/
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/** EkeEke (2011): removed multiple chips support, cleaned code & added FM board interface for Genesis Plus GX **/
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#include "shared.h"
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#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
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#define EG_SH 16 /* 16.16 fixed point (EG timing) */
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#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
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#define FREQ_MASK ((1<<FREQ_SH)-1)
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/* envelope output entries */
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#define ENV_BITS 10
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#define ENV_LEN (1<<ENV_BITS)
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#define ENV_STEP (128.0/ENV_LEN)
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#define MAX_ATT_INDEX ((1<<(ENV_BITS-2))-1) /*255*/
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#define MIN_ATT_INDEX (0)
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/* sinwave entries */
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#define SIN_BITS 10
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#define SIN_LEN (1<<SIN_BITS)
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#define SIN_MASK (SIN_LEN-1)
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#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
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/* register number to channel number , slot offset */
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#define SLOT1 0
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#define SLOT2 1
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/* Envelope Generator phases */
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#define EG_DMP 5
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#define EG_ATT 4
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#define EG_DEC 3
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#define EG_SUS 2
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#define EG_REL 1
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#define EG_OFF 0
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typedef struct
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{
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UINT32 ar; /* attack rate: AR<<2 */
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UINT32 dr; /* decay rate: DR<<2 */
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UINT32 rr; /* release rate:RR<<2 */
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UINT8 KSR; /* key scale rate */
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UINT8 ksl; /* keyscale level */
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UINT8 ksr; /* key scale rate: kcode>>KSR */
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UINT8 mul; /* multiple: mul_tab[ML] */
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/* Phase Generator */
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UINT32 phase; /* frequency counter */
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UINT32 freq; /* frequency counter step */
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UINT8 fb_shift; /* feedback shift value */
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INT32 op1_out[2]; /* slot1 output for feedback */
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/* Envelope Generator */
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UINT8 eg_type; /* percussive/nonpercussive mode */
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UINT8 state; /* phase type */
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UINT32 TL; /* total level: TL << 2 */
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INT32 TLL; /* adjusted now TL */
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INT32 volume; /* envelope counter */
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UINT32 sl; /* sustain level: sl_tab[SL] */
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UINT8 eg_sh_dp; /* (dump state) */
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UINT8 eg_sel_dp; /* (dump state) */
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UINT8 eg_sh_ar; /* (attack state) */
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UINT8 eg_sel_ar; /* (attack state) */
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UINT8 eg_sh_dr; /* (decay state) */
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UINT8 eg_sel_dr; /* (decay state) */
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UINT8 eg_sh_rr; /* (release state for non-perc.) */
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UINT8 eg_sel_rr; /* (release state for non-perc.) */
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UINT8 eg_sh_rs; /* (release state for perc.mode) */
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UINT8 eg_sel_rs; /* (release state for perc.mode) */
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UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */
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/* LFO */
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UINT32 AMmask; /* LFO Amplitude Modulation enable mask */
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UINT8 vib; /* LFO Phase Modulation enable flag (active high)*/
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/* waveform select */
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unsigned int wavetable;
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} YM2413_OPLL_SLOT;
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typedef struct
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{
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YM2413_OPLL_SLOT SLOT[2];
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/* phase generator state */
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UINT32 block_fnum; /* block+fnum */
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UINT32 fc; /* Freq. freqement base */
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UINT32 ksl_base; /* KeyScaleLevel Base step */
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UINT8 kcode; /* key code (for key scaling) */
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UINT8 sus; /* sus on/off (release speed in percussive mode) */
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} YM2413_OPLL_CH;
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122
/* chip state */
123
typedef struct {
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YM2413_OPLL_CH P_CH[9]; /* OPLL chips have 9 channels */
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UINT8 instvol_r[9]; /* instrument/volume (or volume/volume in percussive mode) */
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UINT32 eg_cnt; /* global envelope generator counter */
128
UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
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UINT32 eg_timer_add; /* step of eg_timer */
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UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
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UINT8 rhythm; /* Rhythm mode */
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/* LFO */
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UINT32 lfo_am_cnt;
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UINT32 lfo_am_inc;
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UINT32 lfo_pm_cnt;
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UINT32 lfo_pm_inc;
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UINT32 noise_rng; /* 23 bit noise shift register */
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UINT32 noise_p; /* current noise 'phase' */
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UINT32 noise_f; /* current noise period */
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/* instrument settings */
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/*
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0-user instrument
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1-15 - fixed instruments
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16 -bass drum settings
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17,18 - other percussion instruments
151
*/
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UINT8 inst_tab[19][8];
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UINT32 fn_tab[1024]; /* fnumber->increment counter */
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UINT8 address; /* address register */
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UINT8 status; /* status flag */
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double clock; /* master clock (Hz) */
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int rate; /* sampling rate (Hz) */
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} YM2413;
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/* key scale level */
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/* table is 3dB/octave, DV converts this into 6dB/octave */
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/* 0.1875 is bit 0 weight of the envelope counter (volume) expressed in the 'decibel' scale */
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#define DV (0.1875/1.0)
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static const UINT32 ksl_tab[8*16]=
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{
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/* OCT 0 */
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0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
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0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
172
0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
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0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
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/* OCT 1 */
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0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
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0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
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0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
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1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
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/* OCT 2 */
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0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
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0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
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3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
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4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
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/* OCT 3 */
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0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
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3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
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6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
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7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
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/* OCT 4 */
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0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
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6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
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9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
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10.875/DV,11.250/DV,11.625/DV,12.000/DV,
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/* OCT 5 */
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0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
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9.000/DV,10.125/DV,10.875/DV,11.625/DV,
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12.000/DV,12.750/DV,13.125/DV,13.500/DV,
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13.875/DV,14.250/DV,14.625/DV,15.000/DV,
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/* OCT 6 */
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0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
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12.000/DV,13.125/DV,13.875/DV,14.625/DV,
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15.000/DV,15.750/DV,16.125/DV,16.500/DV,
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16.875/DV,17.250/DV,17.625/DV,18.000/DV,
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/* OCT 7 */
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0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
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15.000/DV,16.125/DV,16.875/DV,17.625/DV,
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18.000/DV,18.750/DV,19.125/DV,19.500/DV,
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19.875/DV,20.250/DV,20.625/DV,21.000/DV
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};
210
#undef DV
211
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/* sustain level table (3dB per step) */
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/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,45 (dB)*/
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#define SC(db) (UINT32) ( db * (1.0/ENV_STEP) )
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static const UINT32 sl_tab[16]={
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SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
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SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(15)
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};
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#undef SC
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#define RATE_STEPS (8)
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static const unsigned char eg_inc[15*RATE_STEPS]={
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/*cycle:0 1 2 3 4 5 6 7*/
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/* 0 */ 0,1, 0,1, 0,1, 0,1, /* rates 00..12 0 (increment by 0 or 1) */
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/* 1 */ 0,1, 0,1, 1,1, 0,1, /* rates 00..12 1 */
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/* 2 */ 0,1, 1,1, 0,1, 1,1, /* rates 00..12 2 */
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/* 3 */ 0,1, 1,1, 1,1, 1,1, /* rates 00..12 3 */
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/* 4 */ 1,1, 1,1, 1,1, 1,1, /* rate 13 0 (increment by 1) */
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/* 5 */ 1,1, 1,2, 1,1, 1,2, /* rate 13 1 */
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/* 6 */ 1,2, 1,2, 1,2, 1,2, /* rate 13 2 */
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/* 7 */ 1,2, 2,2, 1,2, 2,2, /* rate 13 3 */
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/* 8 */ 2,2, 2,2, 2,2, 2,2, /* rate 14 0 (increment by 2) */
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/* 9 */ 2,2, 2,4, 2,2, 2,4, /* rate 14 1 */
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/*10 */ 2,4, 2,4, 2,4, 2,4, /* rate 14 2 */
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/*11 */ 2,4, 4,4, 2,4, 4,4, /* rate 14 3 */
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/*12 */ 4,4, 4,4, 4,4, 4,4, /* rates 15 0, 15 1, 15 2, 15 3 (increment by 4) */
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/*13 */ 8,8, 8,8, 8,8, 8,8, /* rates 15 2, 15 3 for attack */
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/*14 */ 0,0, 0,0, 0,0, 0,0, /* infinity rates for attack and decay(s) */
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};
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#define O(a) (a*RATE_STEPS)
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/*note that there is no O(13) in this table - it's directly in the code */
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static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */
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/* 16 infinite time rates */
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O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
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O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
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/* rates 00-12 */
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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O( 0),O( 1),O( 2),O( 3),
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/* rate 13 */
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O( 4),O( 5),O( 6),O( 7),
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/* rate 14 */
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O( 8),O( 9),O(10),O(11),
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/* rate 15 */
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O(12),O(12),O(12),O(12),
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/* 16 dummy rates (same as 15 3) */
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O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
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O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
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};
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#undef O
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/*rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 */
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/*shift 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0 */
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/*mask 8191, 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0 */
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#define O(a) (a*1)
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static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */
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/* 16 infinite time rates */
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O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
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O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
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/* rates 00-12 */
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O(13),O(13),O(13),O(13),
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O(12),O(12),O(12),O(12),
300
O(11),O(11),O(11),O(11),
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O(10),O(10),O(10),O(10),
302
O( 9),O( 9),O( 9),O( 9),
303
O( 8),O( 8),O( 8),O( 8),
304
O( 7),O( 7),O( 7),O( 7),
305
O( 6),O( 6),O( 6),O( 6),
306
O( 5),O( 5),O( 5),O( 5),
307
O( 4),O( 4),O( 4),O( 4),
308
O( 3),O( 3),O( 3),O( 3),
309
O( 2),O( 2),O( 2),O( 2),
310
O( 1),O( 1),O( 1),O( 1),
311
312
/* rate 13 */
313
O( 0),O( 0),O( 0),O( 0),
314
315
/* rate 14 */
316
O( 0),O( 0),O( 0),O( 0),
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318
/* rate 15 */
319
O( 0),O( 0),O( 0),O( 0),
320
321
/* 16 dummy rates (same as 15 3) */
322
O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
323
O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
324
325
};
326
#undef O
327
328
329
/* multiple table */
330
#define ML 2
331
static const UINT8 mul_tab[16]= {
332
/* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,10,12,12,15,15 */
333
0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,
334
8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML
335
};
336
#undef ML
337
338
/* TL_TAB_LEN is calculated as:
339
* 11 - sinus amplitude bits (Y axis)
340
* 2 - sinus sign bit (Y axis)
341
* TL_RES_LEN - sinus resolution (X axis)
342
*/
343
#define TL_TAB_LEN (11*2*TL_RES_LEN)
344
static signed int tl_tab[TL_TAB_LEN];
345
346
#define ENV_QUIET (TL_TAB_LEN>>5)
347
348
/* sin waveform table in 'decibel' scale */
349
/* two waveforms on OPLL type chips */
350
static unsigned int sin_tab[SIN_LEN * 2];
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/* LFO Amplitude Modulation table (verified on real YM3812)
354
27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples
355
356
Length: 210 elements.
357
358
Each of the elements has to be repeated
359
exactly 64 times (on 64 consecutive samples).
360
The whole table takes: 64 * 210 = 13440 samples.
361
362
We use data>>1, until we find what it really is on real chip...
363
364
*/
365
366
#define LFO_AM_TAB_ELEMENTS 210
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static const UINT8 lfo_am_table[LFO_AM_TAB_ELEMENTS] = {
369
0,0,0,0,0,0,0,
370
1,1,1,1,
371
2,2,2,2,
372
3,3,3,3,
373
4,4,4,4,
374
5,5,5,5,
375
6,6,6,6,
376
7,7,7,7,
377
8,8,8,8,
378
9,9,9,9,
379
10,10,10,10,
380
11,11,11,11,
381
12,12,12,12,
382
13,13,13,13,
383
14,14,14,14,
384
15,15,15,15,
385
16,16,16,16,
386
17,17,17,17,
387
18,18,18,18,
388
19,19,19,19,
389
20,20,20,20,
390
21,21,21,21,
391
22,22,22,22,
392
23,23,23,23,
393
24,24,24,24,
394
25,25,25,25,
395
26,26,26,
396
25,25,25,25,
397
24,24,24,24,
398
23,23,23,23,
399
22,22,22,22,
400
21,21,21,21,
401
20,20,20,20,
402
19,19,19,19,
403
18,18,18,18,
404
17,17,17,17,
405
16,16,16,16,
406
15,15,15,15,
407
14,14,14,14,
408
13,13,13,13,
409
12,12,12,12,
410
11,11,11,11,
411
10,10,10,10,
412
9,9,9,9,
413
8,8,8,8,
414
7,7,7,7,
415
6,6,6,6,
416
5,5,5,5,
417
4,4,4,4,
418
3,3,3,3,
419
2,2,2,2,
420
1,1,1,1
421
};
422
423
/* LFO Phase Modulation table (verified on real YM2413) */
424
static const INT8 lfo_pm_table[8*8] = {
425
426
/* FNUM2/FNUM = 0 00xxxxxx (0x0000) */
427
0, 0, 0, 0, 0, 0, 0, 0,
428
429
/* FNUM2/FNUM = 0 01xxxxxx (0x0040) */
430
1, 0, 0, 0,-1, 0, 0, 0,
431
432
/* FNUM2/FNUM = 0 10xxxxxx (0x0080) */
433
2, 1, 0,-1,-2,-1, 0, 1,
434
435
/* FNUM2/FNUM = 0 11xxxxxx (0x00C0) */
436
3, 1, 0,-1,-3,-1, 0, 1,
437
438
/* FNUM2/FNUM = 1 00xxxxxx (0x0100) */
439
4, 2, 0,-2,-4,-2, 0, 2,
440
441
/* FNUM2/FNUM = 1 01xxxxxx (0x0140) */
442
5, 2, 0,-2,-5,-2, 0, 2,
443
444
/* FNUM2/FNUM = 1 10xxxxxx (0x0180) */
445
6, 3, 0,-3,-6,-3, 0, 3,
446
447
/* FNUM2/FNUM = 1 11xxxxxx (0x01C0) */
448
7, 3, 0,-3,-7,-3, 0, 3,
449
};
450
451
452
/* This is not 100% perfect yet but very close */
453
/*
454
- multi parameters are 100% correct (instruments and drums)
455
- LFO PM and AM enable are 100% correct
456
- waveform DC and DM select are 100% correct
457
*/
458
459
static unsigned char table[19][8] = {
460
/* MULT MULT modTL DcDmFb AR/DR AR/DR SL/RR SL/RR */
461
/* 0 1 2 3 4 5 6 7 */
462
{0x49, 0x4c, 0x4c, 0x12, 0x00, 0x00, 0x00, 0x00 }, /* 0 */
463
464
{0x61, 0x61, 0x1e, 0x17, 0xf0, 0x78, 0x00, 0x17 }, /* 1 */
465
{0x13, 0x41, 0x1e, 0x0d, 0xd7, 0xf7, 0x13, 0x13 }, /* 2 */
466
{0x13, 0x01, 0x99, 0x04, 0xf2, 0xf4, 0x11, 0x23 }, /* 3 */
467
{0x21, 0x61, 0x1b, 0x07, 0xaf, 0x64, 0x40, 0x27 }, /* 4 */
468
469
/*{0x22, 0x21, 0x1e, 0x09, 0xf0, 0x76, 0x08, 0x28 }, */ /* 5 */
470
{0x22, 0x21, 0x1e, 0x06, 0xf0, 0x75, 0x08, 0x18 }, /* 5 */
471
472
/*{0x31, 0x22, 0x16, 0x09, 0x90, 0x7f, 0x00, 0x08 }, */ /* 6 */
473
{0x31, 0x22, 0x16, 0x05, 0x90, 0x71, 0x00, 0x13 }, /* 6 */
474
475
{0x21, 0x61, 0x1d, 0x07, 0x82, 0x80, 0x10, 0x17 }, /* 7 */
476
{0x23, 0x21, 0x2d, 0x16, 0xc0, 0x70, 0x07, 0x07 }, /* 8 */
477
{0x61, 0x61, 0x1b, 0x06, 0x64, 0x65, 0x10, 0x17 }, /* 9 */
478
479
/* {0x61, 0x61, 0x0c, 0x08, 0x85, 0xa0, 0x79, 0x07 }, */ /* A */
480
{0x61, 0x61, 0x0c, 0x18, 0x85, 0xf0, 0x70, 0x07 }, /* A */
481
482
{0x23, 0x01, 0x07, 0x11, 0xf0, 0xa4, 0x00, 0x22 }, /* B */
483
{0x97, 0xc1, 0x24, 0x07, 0xff, 0xf8, 0x22, 0x12 }, /* C */
484
485
/* {0x61, 0x10, 0x0c, 0x08, 0xf2, 0xc4, 0x40, 0xc8 }, */ /* D */
486
{0x61, 0x10, 0x0c, 0x05, 0xf2, 0xf4, 0x40, 0x44 }, /* D */
487
488
{0x01, 0x01, 0x55, 0x03, 0xf3, 0x92, 0xf3, 0xf3 }, /* E */
489
{0x61, 0x41, 0x89, 0x03, 0xf1, 0xf4, 0xf0, 0x13 }, /* F */
490
491
/* drum instruments definitions */
492
/* MULTI MULTI modTL xxx AR/DR AR/DR SL/RR SL/RR */
493
/* 0 1 2 3 4 5 6 7 */
494
{0x01, 0x01, 0x16, 0x00, 0xfd, 0xf8, 0x2f, 0x6d },/* BD(multi verified, modTL verified, mod env - verified(close), carr. env verifed) */
495
{0x01, 0x01, 0x00, 0x00, 0xd8, 0xd8, 0xf9, 0xf8 },/* HH(multi verified), SD(multi not used) */
496
{0x05, 0x01, 0x00, 0x00, 0xf8, 0xba, 0x49, 0x55 },/* TOM(multi,env verified), TOP CYM(multi verified, env verified) */
497
};
498
499
static signed int output[2];
500
501
static UINT32 LFO_AM;
502
static INT32 LFO_PM;
503
504
/* emulated chip */
505
YM2413 ym2413;
506
507
/* advance LFO to next sample */
508
INLINE void advance_lfo(void)
509
{
510
/* LFO */
511
ym2413.lfo_am_cnt += ym2413.lfo_am_inc;
512
if (ym2413.lfo_am_cnt >= (LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
513
ym2413.lfo_am_cnt -= (LFO_AM_TAB_ELEMENTS<<LFO_SH);
514
515
LFO_AM = lfo_am_table[ ym2413.lfo_am_cnt >> LFO_SH ] >> 1;
516
517
ym2413.lfo_pm_cnt += ym2413.lfo_pm_inc;
518
LFO_PM = (ym2413.lfo_pm_cnt>>LFO_SH) & 7;
519
}
520
521
/* advance to next sample */
522
INLINE void advance(void)
523
{
524
YM2413_OPLL_CH *CH;
525
YM2413_OPLL_SLOT *op;
526
unsigned int i;
527
528
/* Envelope Generator */
529
ym2413.eg_timer += ym2413.eg_timer_add;
530
531
while (ym2413.eg_timer >= ym2413.eg_timer_overflow)
532
{
533
ym2413.eg_timer -= ym2413.eg_timer_overflow;
534
535
ym2413.eg_cnt++;
536
537
for (i=0; i<9*2; i++)
538
{
539
CH = &ym2413.P_CH[i>>1];
540
541
op = &CH->SLOT[i&1];
542
543
switch(op->state)
544
{
545
case EG_DMP: /* dump phase */
546
/*dump phase is performed by both operators in each channel*/
547
/*when CARRIER envelope gets down to zero level,
548
** phases in BOTH opearators are reset (at the same time ?)
549
*/
550
if ( !(ym2413.eg_cnt & ((1<<op->eg_sh_dp)-1) ) )
551
{
552
op->volume += eg_inc[op->eg_sel_dp + ((ym2413.eg_cnt>>op->eg_sh_dp)&7)];
553
554
if ( op->volume >= MAX_ATT_INDEX )
555
{
556
op->volume = MAX_ATT_INDEX;
557
op->state = EG_ATT;
558
/* restart Phase Generator */
559
op->phase = 0;
560
}
561
}
562
break;
563
564
case EG_ATT: /* attack phase */
565
if ( !(ym2413.eg_cnt & ((1<<op->eg_sh_ar)-1) ) )
566
{
567
op->volume += (~op->volume *
568
(eg_inc[op->eg_sel_ar + ((ym2413.eg_cnt>>op->eg_sh_ar)&7)])
569
) >>2;
570
571
if (op->volume <= MIN_ATT_INDEX)
572
{
573
op->volume = MIN_ATT_INDEX;
574
op->state = EG_DEC;
575
}
576
}
577
break;
578
579
case EG_DEC: /* decay phase */
580
if ( !(ym2413.eg_cnt & ((1<<op->eg_sh_dr)-1) ) )
581
{
582
op->volume += eg_inc[op->eg_sel_dr + ((ym2413.eg_cnt>>op->eg_sh_dr)&7)];
583
584
if ( op->volume >= op->sl )
585
op->state = EG_SUS;
586
}
587
break;
588
589
case EG_SUS: /* sustain phase */
590
/* this is important behaviour:
591
one can change percusive/non-percussive modes on the fly and
592
the chip will remain in sustain phase - verified on real YM3812 */
593
594
if(op->eg_type) /* non-percussive mode (sustained tone) */
595
{
596
/* do nothing */
597
}
598
else /* percussive mode */
599
{
600
/* during sustain phase chip adds Release Rate (in percussive mode) */
601
if ( !(ym2413.eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
602
{
603
op->volume += eg_inc[op->eg_sel_rr + ((ym2413.eg_cnt>>op->eg_sh_rr)&7)];
604
605
if ( op->volume >= MAX_ATT_INDEX )
606
op->volume = MAX_ATT_INDEX;
607
}
608
/* else do nothing in sustain phase */
609
}
610
break;
611
612
case EG_REL: /* release phase */
613
/* exclude modulators in melody channels from performing anything in this mode*/
614
/* allowed are only carriers in melody mode and rhythm slots in rhythm mode */
615
616
/*This table shows which operators and on what conditions are allowed to perform EG_REL:
617
(a) - always perform EG_REL
618
(n) - never perform EG_REL
619
(r) - perform EG_REL in Rhythm mode ONLY
620
0: 0 (n), 1 (a)
621
1: 2 (n), 3 (a)
622
2: 4 (n), 5 (a)
623
3: 6 (n), 7 (a)
624
4: 8 (n), 9 (a)
625
5: 10(n), 11(a)
626
6: 12(r), 13(a)
627
7: 14(r), 15(a)
628
8: 16(r), 17(a)
629
*/
630
if ( (i&1) || ((ym2413.rhythm&0x20) && (i>=12)) )/* exclude modulators */
631
{
632
if(op->eg_type) /* non-percussive mode (sustained tone) */
633
/*this is correct: use RR when SUS = OFF*/
634
/*and use RS when SUS = ON*/
635
{
636
if (CH->sus)
637
{
638
if ( !(ym2413.eg_cnt & ((1<<op->eg_sh_rs)-1) ) )
639
{
640
op->volume += eg_inc[op->eg_sel_rs + ((ym2413.eg_cnt>>op->eg_sh_rs)&7)];
641
if ( op->volume >= MAX_ATT_INDEX )
642
{
643
op->volume = MAX_ATT_INDEX;
644
op->state = EG_OFF;
645
}
646
}
647
}
648
else
649
{
650
if ( !(ym2413.eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
651
{
652
op->volume += eg_inc[op->eg_sel_rr + ((ym2413.eg_cnt>>op->eg_sh_rr)&7)];
653
if ( op->volume >= MAX_ATT_INDEX )
654
{
655
op->volume = MAX_ATT_INDEX;
656
op->state = EG_OFF;
657
}
658
}
659
}
660
}
661
else /* percussive mode */
662
{
663
if ( !(ym2413.eg_cnt & ((1<<op->eg_sh_rs)-1) ) )
664
{
665
op->volume += eg_inc[op->eg_sel_rs + ((ym2413.eg_cnt>>op->eg_sh_rs)&7)];
666
if ( op->volume >= MAX_ATT_INDEX )
667
{
668
op->volume = MAX_ATT_INDEX;
669
op->state = EG_OFF;
670
}
671
}
672
}
673
}
674
break;
675
676
default:
677
break;
678
}
679
}
680
}
681
682
for (i=0; i<9*2; i++)
683
{
684
CH = &ym2413.P_CH[i/2];
685
op = &CH->SLOT[i&1];
686
687
/* Phase Generator */
688
if(op->vib)
689
{
690
UINT8 block;
691
692
unsigned int fnum_lfo = 8*((CH->block_fnum&0x01c0) >> 6);
693
unsigned int block_fnum = CH->block_fnum * 2;
694
signed int lfo_fn_table_index_offset = lfo_pm_table[LFO_PM + fnum_lfo ];
695
696
if (lfo_fn_table_index_offset) /* LFO phase modulation active */
697
{
698
block_fnum += lfo_fn_table_index_offset;
699
block = (block_fnum&0x1c00) >> 10;
700
op->phase += (ym2413.fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul;
701
}
702
else /* LFO phase modulation = zero */
703
{
704
op->phase += op->freq;
705
}
706
}
707
else /* LFO phase modulation disabled for this operator */
708
{
709
op->phase += op->freq;
710
}
711
}
712
713
/* The Noise Generator of the YM3812 is 23-bit shift register.
714
* Period is equal to 2^23-2 samples.
715
* Register works at sampling frequency of the chip, so output
716
* can change on every sample.
717
*
718
* Output of the register and input to the bit 22 is:
719
* bit0 XOR bit14 XOR bit15 XOR bit22
720
*
721
* Simply use bit 22 as the noise output.
722
*/
723
724
ym2413.noise_p += ym2413.noise_f;
725
i = ym2413.noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */
726
ym2413.noise_p &= FREQ_MASK;
727
while (i)
728
{
729
/*
730
UINT32 j;
731
j = ( (chip->noise_rng) ^ (chip->noise_rng>>14) ^ (chip->noise_rng>>15) ^ (chip->noise_rng>>22) ) & 1;
732
chip->noise_rng = (j<<22) | (chip->noise_rng>>1);
733
*/
734
735
/*
736
Instead of doing all the logic operations above, we
737
use a trick here (and use bit 0 as the noise output).
738
The difference is only that the noise bit changes one
739
step ahead. This doesn't matter since we don't know
740
what is real state of the noise_rng after the reset.
741
*/
742
743
if (ym2413.noise_rng & 1) ym2413.noise_rng ^= 0x800302;
744
ym2413.noise_rng >>= 1;
745
746
i--;
747
}
748
}
749
750
751
INLINE signed int op_calc(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
752
{
753
UINT32 p = (env<<5) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + (pm<<17))) >> FREQ_SH ) & SIN_MASK) ];
754
755
if (p >= TL_TAB_LEN)
756
return 0;
757
return tl_tab[p];
758
}
759
760
INLINE signed int op_calc1(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
761
{
762
UINT32 p = (env<<5) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + pm)) >> FREQ_SH ) & SIN_MASK) ];
763
764
if (p >= TL_TAB_LEN)
765
return 0;
766
return tl_tab[p];
767
}
768
769
#define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (LFO_AM & (OP)->AMmask))
770
771
/* calculate output */
772
INLINE void chan_calc( YM2413_OPLL_CH *CH )
773
{
774
YM2413_OPLL_SLOT *SLOT;
775
unsigned int env;
776
signed int out;
777
signed int phase_modulation; /* phase modulation input (SLOT 2) */
778
779
/* SLOT 1 */
780
SLOT = &CH->SLOT[SLOT1];
781
env = volume_calc(SLOT);
782
out = SLOT->op1_out[0] + SLOT->op1_out[1];
783
784
SLOT->op1_out[0] = SLOT->op1_out[1];
785
phase_modulation = SLOT->op1_out[0];
786
787
SLOT->op1_out[1] = 0;
788
789
if( env < ENV_QUIET )
790
{
791
if (!SLOT->fb_shift)
792
out = 0;
793
SLOT->op1_out[1] = op_calc1(SLOT->phase, env, (out<<SLOT->fb_shift), SLOT->wavetable );
794
}
795
796
/* SLOT 2 */
797
798
SLOT++;
799
env = volume_calc(SLOT);
800
if( env < ENV_QUIET )
801
{
802
output[0] += op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable);
803
}
804
}
805
806
/*
807
operators used in the rhythm sounds generation process:
808
809
Envelope Generator:
810
811
channel operator register number Bass High Snare Tom Top
812
/ slot number TL ARDR SLRR Wave Drum Hat Drum Tom Cymbal
813
6 / 0 12 50 70 90 f0 +
814
6 / 1 15 53 73 93 f3 +
815
7 / 0 13 51 71 91 f1 +
816
7 / 1 16 54 74 94 f4 +
817
8 / 0 14 52 72 92 f2 +
818
8 / 1 17 55 75 95 f5 +
819
820
Phase Generator:
821
822
channel operator register number Bass High Snare Tom Top
823
/ slot number MULTIPLE Drum Hat Drum Tom Cymbal
824
6 / 0 12 30 +
825
6 / 1 15 33 +
826
7 / 0 13 31 + + +
827
7 / 1 16 34 ----- n o t u s e d -----
828
8 / 0 14 32 +
829
8 / 1 17 35 + +
830
831
channel operator register number Bass High Snare Tom Top
832
number number BLK/FNUM2 FNUM Drum Hat Drum Tom Cymbal
833
6 12,15 B6 A6 +
834
835
7 13,16 B7 A7 + + +
836
837
8 14,17 B8 A8 + + +
838
839
*/
840
841
/* calculate rhythm */
842
843
INLINE void rhythm_calc( YM2413_OPLL_CH *CH, unsigned int noise )
844
{
845
YM2413_OPLL_SLOT *SLOT;
846
signed int out;
847
unsigned int env;
848
signed int phase_modulation; /* phase modulation input (SLOT 2) */
849
850
851
/* Bass Drum (verified on real YM3812):
852
- depends on the channel 6 'connect' register:
853
when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out)
854
when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored
855
- output sample always is multiplied by 2
856
*/
857
858
859
/* SLOT 1 */
860
SLOT = &CH[6].SLOT[SLOT1];
861
env = volume_calc(SLOT);
862
863
out = SLOT->op1_out[0] + SLOT->op1_out[1];
864
SLOT->op1_out[0] = SLOT->op1_out[1];
865
866
phase_modulation = SLOT->op1_out[0];
867
868
SLOT->op1_out[1] = 0;
869
if( env < ENV_QUIET )
870
{
871
if (!SLOT->fb_shift)
872
out = 0;
873
SLOT->op1_out[1] = op_calc1(SLOT->phase, env, (out<<SLOT->fb_shift), SLOT->wavetable );
874
}
875
876
/* SLOT 2 */
877
SLOT++;
878
env = volume_calc(SLOT);
879
if( env < ENV_QUIET )
880
output[1] += op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable);
881
882
883
/* Phase generation is based on: */
884
/* HH (13) channel 7->slot 1 combined with channel 8->slot 2 (same combination as TOP CYMBAL but different output phases) */
885
/* SD (16) channel 7->slot 1 */
886
/* TOM (14) channel 8->slot 1 */
887
/* TOP (17) channel 7->slot 1 combined with channel 8->slot 2 (same combination as HIGH HAT but different output phases) */
888
889
/* Envelope generation based on: */
890
/* HH channel 7->slot1 */
891
/* SD channel 7->slot2 */
892
/* TOM channel 8->slot1 */
893
/* TOP channel 8->slot2 */
894
895
896
/* The following formulas can be well optimized.
897
I leave them in direct form for now (in case I've missed something).
898
*/
899
900
/* High Hat (verified on real YM3812) */
901
env = volume_calc(&CH[7].SLOT[SLOT1]);
902
if( env < ENV_QUIET )
903
{
904
905
/* high hat phase generation:
906
phase = d0 or 234 (based on frequency only)
907
phase = 34 or 2d0 (based on noise)
908
*/
909
910
/* base frequency derived from operator 1 in channel 7 */
911
unsigned char bit7 = ((CH[7].SLOT[SLOT1].phase>>FREQ_SH)>>7)&1;
912
unsigned char bit3 = ((CH[7].SLOT[SLOT1].phase>>FREQ_SH)>>3)&1;
913
unsigned char bit2 = ((CH[7].SLOT[SLOT1].phase>>FREQ_SH)>>2)&1;
914
915
unsigned char res1 = (bit2 ^ bit7) | bit3;
916
917
/* when res1 = 0 phase = 0x000 | 0xd0; */
918
/* when res1 = 1 phase = 0x200 | (0xd0>>2); */
919
UINT32 phase = res1 ? (0x200|(0xd0>>2)) : 0xd0;
920
921
/* enable gate based on frequency of operator 2 in channel 8 */
922
unsigned char bit5e= ((CH[8].SLOT[SLOT2].phase>>FREQ_SH)>>5)&1;
923
unsigned char bit3e= ((CH[8].SLOT[SLOT2].phase>>FREQ_SH)>>3)&1;
924
925
unsigned char res2 = (bit3e | bit5e);
926
927
/* when res2 = 0 pass the phase from calculation above (res1); */
928
/* when res2 = 1 phase = 0x200 | (0xd0>>2); */
929
if (res2)
930
phase = (0x200|(0xd0>>2));
931
932
933
/* when phase & 0x200 is set and noise=1 then phase = 0x200|0xd0 */
934
/* when phase & 0x200 is set and noise=0 then phase = 0x200|(0xd0>>2), ie no change */
935
if (phase&0x200)
936
{
937
if (noise)
938
phase = 0x200|0xd0;
939
}
940
else
941
/* when phase & 0x200 is clear and noise=1 then phase = 0xd0>>2 */
942
/* when phase & 0x200 is clear and noise=0 then phase = 0xd0, ie no change */
943
{
944
if (noise)
945
phase = 0xd0>>2;
946
}
947
948
output[1] += op_calc(phase<<FREQ_SH, env, 0, CH[7].SLOT[SLOT1].wavetable);
949
}
950
951
/* Snare Drum (verified on real YM3812) */
952
env = volume_calc(&CH[7].SLOT[SLOT2]);
953
if( env < ENV_QUIET )
954
{
955
/* base frequency derived from operator 1 in channel 7 */
956
unsigned char bit8 = ((CH[7].SLOT[SLOT1].phase>>FREQ_SH)>>8)&1;
957
958
/* when bit8 = 0 phase = 0x100; */
959
/* when bit8 = 1 phase = 0x200; */
960
UINT32 phase = bit8 ? 0x200 : 0x100;
961
962
/* Noise bit XOR'es phase by 0x100 */
963
/* when noisebit = 0 pass the phase from calculation above */
964
/* when noisebit = 1 phase ^= 0x100; */
965
/* in other words: phase ^= (noisebit<<8); */
966
if (noise)
967
phase ^= 0x100;
968
969
output[1] += op_calc(phase<<FREQ_SH, env, 0, CH[7].SLOT[SLOT2].wavetable);
970
}
971
972
/* Tom Tom (verified on real YM3812) */
973
env = volume_calc(&CH[8].SLOT[SLOT1]);
974
if( env < ENV_QUIET )
975
output[1] += op_calc(CH[8].SLOT[SLOT1].phase, env, 0, CH[8].SLOT[SLOT1].wavetable);
976
977
/* Top Cymbal (verified on real YM2413) */
978
env = volume_calc(&CH[8].SLOT[SLOT2]);
979
if( env < ENV_QUIET )
980
{
981
/* base frequency derived from operator 1 in channel 7 */
982
unsigned char bit7 = ((CH[7].SLOT[SLOT1].phase>>FREQ_SH)>>7)&1;
983
unsigned char bit3 = ((CH[7].SLOT[SLOT1].phase>>FREQ_SH)>>3)&1;
984
unsigned char bit2 = ((CH[7].SLOT[SLOT1].phase>>FREQ_SH)>>2)&1;
985
986
unsigned char res1 = (bit2 ^ bit7) | bit3;
987
988
/* when res1 = 0 phase = 0x000 | 0x100; */
989
/* when res1 = 1 phase = 0x200 | 0x100; */
990
UINT32 phase = res1 ? 0x300 : 0x100;
991
992
/* enable gate based on frequency of operator 2 in channel 8 */
993
unsigned char bit5e= ((CH[8].SLOT[SLOT2].phase>>FREQ_SH)>>5)&1;
994
unsigned char bit3e= ((CH[8].SLOT[SLOT2].phase>>FREQ_SH)>>3)&1;
995
996
unsigned char res2 = (bit3e | bit5e);
997
/* when res2 = 0 pass the phase from calculation above (res1); */
998
/* when res2 = 1 phase = 0x200 | 0x100; */
999
if (res2)
1000
phase = 0x300;
1001
1002
output[1] += op_calc(phase<<FREQ_SH, env, 0, CH[8].SLOT[SLOT2].wavetable);
1003
}
1004
}
1005
1006
1007
/* generic table initialize */
1008
static int init_tables(void)
1009
{
1010
signed int i,x;
1011
signed int n;
1012
double o,m;
1013
1014
for (x=0; x<TL_RES_LEN; x++)
1015
{
1016
m = (1<<16) / pow(2, (x+1) * (ENV_STEP/4.0) / 8.0);
1017
m = floor(m);
1018
1019
/* we never reach (1<<16) here due to the (x+1) */
1020
/* result fits within 16 bits at maximum */
1021
1022
n = (int)m; /* 16 bits here */
1023
n >>= 4; /* 12 bits here */
1024
if (n&1) /* round to nearest */
1025
n = (n>>1)+1;
1026
else
1027
n = n>>1;
1028
/* 11 bits here (rounded) */
1029
tl_tab[ x*2 + 0 ] = n;
1030
tl_tab[ x*2 + 1 ] = -tl_tab[ x*2 + 0 ];
1031
1032
for (i=1; i<11; i++)
1033
{
1034
tl_tab[ x*2+0 + i*2*TL_RES_LEN ] = tl_tab[ x*2+0 ]>>i;
1035
tl_tab[ x*2+1 + i*2*TL_RES_LEN ] = -tl_tab[ x*2+0 + i*2*TL_RES_LEN ];
1036
}
1037
}
1038
1039
for (i=0; i<SIN_LEN; i++)
1040
{
1041
/* non-standard sinus */
1042
m = sin( ((i*2)+1) * M_PI / SIN_LEN ); /* checked against the real chip */
1043
1044
/* we never reach zero here due to ((i*2)+1) */
1045
1046
if (m>0.0)
1047
o = 8*log(1.0/m)/log(2); /* convert to 'decibels' */
1048
else
1049
o = 8*log(-1.0/m)/log(2); /* convert to 'decibels' */
1050
1051
o = o / (ENV_STEP/4);
1052
1053
n = (int)(2.0*o);
1054
if (n&1) /* round to nearest */
1055
n = (n>>1)+1;
1056
else
1057
n = n>>1;
1058
1059
/* waveform 0: standard sinus */
1060
sin_tab[ i ] = n*2 + (m>=0.0? 0: 1 );
1061
1062
/* waveform 1: __ __ */
1063
/* / \____/ \____*/
1064
/* output only first half of the sinus waveform (positive one) */
1065
if (i & (1<<(SIN_BITS-1)) )
1066
sin_tab[1*SIN_LEN+i] = TL_TAB_LEN;
1067
else
1068
sin_tab[1*SIN_LEN+i] = sin_tab[i];
1069
}
1070
1071
return 1;
1072
}
1073
1074
1075
static void OPLL_initalize(void)
1076
{
1077
int i;
1078
1079
/* YM2413 always running at original frequency */
1080
double freqbase = 1.0;
1081
1082
/* make fnumber -> increment counter table */
1083
for( i = 0 ; i < 1024; i++ )
1084
{
1085
/* OPLL (YM2413) phase increment counter = 18bit */
1086
ym2413.fn_tab[i] = (UINT32)( (double)i * 64 * freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
1087
}
1088
1089
/* Amplitude modulation: 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples */
1090
/* One entry from LFO_AM_TABLE lasts for 64 samples */
1091
ym2413.lfo_am_inc = (1.0 / 64.0 ) * (1<<LFO_SH) * freqbase;
1092
1093
/* Vibrato: 8 output levels (triangle waveform); 1 level takes 1024 samples */
1094
ym2413.lfo_pm_inc = (1.0 / 1024.0) * (1<<LFO_SH) * freqbase;
1095
1096
/* Noise generator: a step takes 1 sample */
1097
ym2413.noise_f = (1.0 / 1.0) * (1<<FREQ_SH) * freqbase;
1098
1099
ym2413.eg_timer_add = (1<<EG_SH) * freqbase;
1100
ym2413.eg_timer_overflow = ( 1 ) * (1<<EG_SH);
1101
}
1102
1103
INLINE void KEY_ON(YM2413_OPLL_SLOT *SLOT, UINT32 key_set)
1104
{
1105
if( !SLOT->key )
1106
{
1107
/* do NOT restart Phase Generator (verified on real YM2413)*/
1108
/* phase -> Dump */
1109
SLOT->state = EG_DMP;
1110
}
1111
SLOT->key |= key_set;
1112
}
1113
1114
INLINE void KEY_OFF(YM2413_OPLL_SLOT *SLOT, UINT32 key_clr)
1115
{
1116
if( SLOT->key )
1117
{
1118
SLOT->key &= key_clr;
1119
1120
if( !SLOT->key )
1121
{
1122
/* phase -> Release */
1123
if (SLOT->state>EG_REL)
1124
SLOT->state = EG_REL;
1125
}
1126
}
1127
}
1128
1129
/* update phase increment counter of operator (also update the EG rates if necessary) */
1130
INLINE void CALC_FCSLOT(YM2413_OPLL_CH *CH,YM2413_OPLL_SLOT *SLOT)
1131
{
1132
int ksr;
1133
UINT32 SLOT_rs;
1134
UINT32 SLOT_dp;
1135
1136
/* (frequency) phase increment counter */
1137
SLOT->freq = CH->fc * SLOT->mul;
1138
ksr = CH->kcode >> SLOT->KSR;
1139
1140
if( SLOT->ksr != ksr )
1141
{
1142
SLOT->ksr = ksr;
1143
1144
/* calculate envelope generator rates */
1145
if ((SLOT->ar + SLOT->ksr) < 16+62)
1146
{
1147
SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ];
1148
SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
1149
}
1150
else
1151
{
1152
SLOT->eg_sh_ar = 0;
1153
SLOT->eg_sel_ar = 13*RATE_STEPS;
1154
}
1155
SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ];
1156
SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ];
1157
SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ];
1158
SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ];
1159
1160
}
1161
1162
if (CH->sus)
1163
SLOT_rs = 16 + (5<<2);
1164
else
1165
SLOT_rs = 16 + (7<<2);
1166
1167
SLOT->eg_sh_rs = eg_rate_shift [SLOT_rs + SLOT->ksr ];
1168
SLOT->eg_sel_rs = eg_rate_select[SLOT_rs + SLOT->ksr ];
1169
1170
SLOT_dp = 16 + (13<<2);
1171
SLOT->eg_sh_dp = eg_rate_shift [SLOT_dp + SLOT->ksr ];
1172
SLOT->eg_sel_dp = eg_rate_select[SLOT_dp + SLOT->ksr ];
1173
}
1174
1175
/* set multi,am,vib,EG-TYP,KSR,mul */
1176
INLINE void set_mul(int slot,int v)
1177
{
1178
YM2413_OPLL_CH *CH = &ym2413.P_CH[slot/2];
1179
YM2413_OPLL_SLOT *SLOT = &CH->SLOT[slot&1];
1180
1181
SLOT->mul = mul_tab[v&0x0f];
1182
SLOT->KSR = (v&0x10) ? 0 : 2;
1183
SLOT->eg_type = (v&0x20);
1184
SLOT->vib = (v&0x40);
1185
SLOT->AMmask = (v&0x80) ? ~0 : 0;
1186
CALC_FCSLOT(CH,SLOT);
1187
}
1188
1189
/* set ksl, tl */
1190
INLINE void set_ksl_tl(int chan,int v)
1191
{
1192
YM2413_OPLL_CH *CH = &ym2413.P_CH[chan];
1193
/* modulator */
1194
YM2413_OPLL_SLOT *SLOT = &CH->SLOT[SLOT1];
1195
1196
int ksl = v>>6; /* 0 / 1.5 / 3.0 / 6.0 dB/OCT */
1197
1198
SLOT->ksl = ksl ? 3-ksl : 31;
1199
SLOT->TL = (v&0x3f)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1200
SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1201
}
1202
1203
/* set ksl , waveforms, feedback */
1204
INLINE void set_ksl_wave_fb(int chan,int v)
1205
{
1206
YM2413_OPLL_CH *CH = &ym2413.P_CH[chan];
1207
/* modulator */
1208
YM2413_OPLL_SLOT *SLOT = &CH->SLOT[SLOT1];
1209
SLOT->wavetable = ((v&0x08)>>3)*SIN_LEN;
1210
SLOT->fb_shift = (v&7) ? (v&7) + 8 : 0;
1211
1212
/*carrier*/
1213
SLOT = &CH->SLOT[SLOT2];
1214
SLOT->wavetable = ((v&0x10)>>4)*SIN_LEN;
1215
v >>= 6; /* 0 / 1.5 / 3.0 / 6.0 dB/OCT */
1216
SLOT->ksl = v ? 3-v : 31;
1217
SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1218
}
1219
1220
/* set attack rate & decay rate */
1221
INLINE void set_ar_dr(int slot,int v)
1222
{
1223
YM2413_OPLL_CH *CH = &ym2413.P_CH[slot/2];
1224
YM2413_OPLL_SLOT *SLOT = &CH->SLOT[slot&1];
1225
1226
SLOT->ar = (v>>4) ? 16 + ((v>>4) <<2) : 0;
1227
1228
if ((SLOT->ar + SLOT->ksr) < 16+62)
1229
{
1230
SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ];
1231
SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
1232
}
1233
else
1234
{
1235
SLOT->eg_sh_ar = 0;
1236
SLOT->eg_sel_ar = 13*RATE_STEPS;
1237
}
1238
1239
SLOT->dr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0;
1240
SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ];
1241
SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ];
1242
}
1243
1244
/* set sustain level & release rate */
1245
INLINE void set_sl_rr(int slot,int v)
1246
{
1247
YM2413_OPLL_CH *CH = &ym2413.P_CH[slot/2];
1248
YM2413_OPLL_SLOT *SLOT = &CH->SLOT[slot&1];
1249
1250
SLOT->sl = sl_tab[ v>>4 ];
1251
1252
SLOT->rr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0;
1253
SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ];
1254
SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ];
1255
}
1256
1257
static void load_instrument(UINT32 chan, UINT32 slot, UINT8* inst )
1258
{
1259
set_mul(slot, inst[0]);
1260
set_mul(slot+1, inst[1]);
1261
set_ksl_tl(chan, inst[2]);
1262
set_ksl_wave_fb(chan, inst[3]);
1263
set_ar_dr(slot, inst[4]);
1264
set_ar_dr(slot+1, inst[5]);
1265
set_sl_rr(slot, inst[6]);
1266
set_sl_rr(slot+1, inst[7]);
1267
}
1268
1269
static void update_instrument_zero(UINT8 r)
1270
{
1271
UINT8* inst = &ym2413.inst_tab[0][0]; /* point to user instrument */
1272
UINT32 chan;
1273
1274
UINT32 chan_max = 9;
1275
if (ym2413.rhythm & 0x20)
1276
chan_max=6;
1277
1278
switch(r&7)
1279
{
1280
case 0:
1281
for (chan=0; chan<chan_max; chan++)
1282
{
1283
if ((ym2413.instvol_r[chan]&0xf0)==0)
1284
{
1285
set_mul(chan*2, inst[0]);
1286
}
1287
}
1288
break;
1289
1290
case 1:
1291
for (chan=0; chan<chan_max; chan++)
1292
{
1293
if ((ym2413.instvol_r[chan]&0xf0)==0)
1294
{
1295
set_mul(chan*2+1, inst[1]);
1296
}
1297
}
1298
break;
1299
1300
case 2:
1301
for (chan=0; chan<chan_max; chan++)
1302
{
1303
if ((ym2413.instvol_r[chan]&0xf0)==0)
1304
{
1305
set_ksl_tl(chan, inst[2]);
1306
}
1307
}
1308
break;
1309
1310
case 3:
1311
for (chan=0; chan<chan_max; chan++)
1312
{
1313
if ((ym2413.instvol_r[chan]&0xf0)==0)
1314
{
1315
set_ksl_wave_fb(chan, inst[3]);
1316
}
1317
}
1318
break;
1319
1320
case 4:
1321
for (chan=0; chan<chan_max; chan++)
1322
{
1323
if ((ym2413.instvol_r[chan]&0xf0)==0)
1324
{
1325
set_ar_dr(chan*2, inst[4]);
1326
}
1327
}
1328
break;
1329
1330
case 5:
1331
for (chan=0; chan<chan_max; chan++)
1332
{
1333
if ((ym2413.instvol_r[chan]&0xf0)==0)
1334
{
1335
set_ar_dr(chan*2+1, inst[5]);
1336
}
1337
}
1338
break;
1339
1340
case 6:
1341
for (chan=0; chan<chan_max; chan++)
1342
{
1343
if ((ym2413.instvol_r[chan]&0xf0)==0)
1344
{
1345
set_sl_rr(chan*2, inst[6]);
1346
}
1347
}
1348
break;
1349
1350
case 7:
1351
for (chan=0; chan<chan_max; chan++)
1352
{
1353
if ((ym2413.instvol_r[chan]&0xf0)==0)
1354
{
1355
set_sl_rr(chan*2+1, inst[7]);
1356
}
1357
}
1358
break;
1359
}
1360
}
1361
1362
/* write a value v to register r on chip chip */
1363
static void OPLLWriteReg(int r, int v)
1364
{
1365
YM2413_OPLL_CH *CH;
1366
YM2413_OPLL_SLOT *SLOT;
1367
1368
/* adjust bus to 8 bits */
1369
r &= 0xff;
1370
v &= 0xff;
1371
1372
switch(r&0xf0)
1373
{
1374
case 0x00: /* 00-0f:control */
1375
{
1376
switch(r&0x0f)
1377
{
1378
case 0x00: /* AM/VIB/EGTYP/KSR/MULTI (modulator) */
1379
case 0x01: /* AM/VIB/EGTYP/KSR/MULTI (carrier) */
1380
case 0x02: /* Key Scale Level, Total Level (modulator) */
1381
case 0x03: /* Key Scale Level, carrier waveform, modulator waveform, Feedback */
1382
case 0x04: /* Attack, Decay (modulator) */
1383
case 0x05: /* Attack, Decay (carrier) */
1384
case 0x06: /* Sustain, Release (modulator) */
1385
case 0x07: /* Sustain, Release (carrier) */
1386
{
1387
ym2413.inst_tab[0][r] = v;
1388
update_instrument_zero(r);
1389
break;
1390
}
1391
1392
case 0x0e: /* x, x, r,bd,sd,tom,tc,hh */
1393
{
1394
if(v&0x20)
1395
{
1396
/* rhythm OFF to ON */
1397
if ((ym2413.rhythm&0x20)==0)
1398
{
1399
/* Load instrument settings for channel seven(chan=6 since we're zero based). (Bass drum) */
1400
load_instrument(6, 12, &ym2413.inst_tab[16][0]);
1401
1402
/* Load instrument settings for channel eight. (High hat and snare drum) */
1403
load_instrument(7, 14, &ym2413.inst_tab[17][0]);
1404
1405
CH = &ym2413.P_CH[7];
1406
SLOT = &CH->SLOT[SLOT1]; /* modulator envelope is HH */
1407
SLOT->TL = ((ym2413.instvol_r[7]>>4)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1408
SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1409
1410
/* Load instrument settings for channel nine. (Tom-tom and top cymbal) */
1411
load_instrument(8, 16, &ym2413.inst_tab[18][0]);
1412
1413
CH = &ym2413.P_CH[8];
1414
SLOT = &CH->SLOT[SLOT1]; /* modulator envelope is TOM */
1415
SLOT->TL = ((ym2413.instvol_r[8]>>4)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1416
SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1417
}
1418
1419
/* BD key on/off */
1420
if(v&0x10)
1421
{
1422
KEY_ON (&ym2413.P_CH[6].SLOT[SLOT1], 2);
1423
KEY_ON (&ym2413.P_CH[6].SLOT[SLOT2], 2);
1424
}
1425
else
1426
{
1427
KEY_OFF(&ym2413.P_CH[6].SLOT[SLOT1],~2);
1428
KEY_OFF(&ym2413.P_CH[6].SLOT[SLOT2],~2);
1429
}
1430
1431
/* HH key on/off */
1432
if(v&0x01) KEY_ON (&ym2413.P_CH[7].SLOT[SLOT1], 2);
1433
else KEY_OFF(&ym2413.P_CH[7].SLOT[SLOT1],~2);
1434
1435
/* SD key on/off */
1436
if(v&0x08) KEY_ON (&ym2413.P_CH[7].SLOT[SLOT2], 2);
1437
else KEY_OFF(&ym2413.P_CH[7].SLOT[SLOT2],~2);
1438
1439
/* TOM key on/off */
1440
if(v&0x04) KEY_ON (&ym2413.P_CH[8].SLOT[SLOT1], 2);
1441
else KEY_OFF(&ym2413.P_CH[8].SLOT[SLOT1],~2);
1442
1443
/* TOP-CY key on/off */
1444
if(v&0x02) KEY_ON (&ym2413.P_CH[8].SLOT[SLOT2], 2);
1445
else KEY_OFF(&ym2413.P_CH[8].SLOT[SLOT2],~2);
1446
}
1447
else
1448
{
1449
/* rhythm ON to OFF */
1450
if (ym2413.rhythm&0x20)
1451
{
1452
/* Load instrument settings for channel seven(chan=6 since we're zero based).*/
1453
load_instrument(6, 12, &ym2413.inst_tab[ym2413.instvol_r[6]>>4][0]);
1454
1455
/* Load instrument settings for channel eight.*/
1456
load_instrument(7, 14, &ym2413.inst_tab[ym2413.instvol_r[7]>>4][0]);
1457
1458
/* Load instrument settings for channel nine.*/
1459
load_instrument(8, 16, &ym2413.inst_tab[ym2413.instvol_r[8]>>4][0]);
1460
}
1461
1462
/* BD key off */
1463
KEY_OFF(&ym2413.P_CH[6].SLOT[SLOT1],~2);
1464
KEY_OFF(&ym2413.P_CH[6].SLOT[SLOT2],~2);
1465
1466
/* HH key off */
1467
KEY_OFF(&ym2413.P_CH[7].SLOT[SLOT1],~2);
1468
1469
/* SD key off */
1470
KEY_OFF(&ym2413.P_CH[7].SLOT[SLOT2],~2);
1471
1472
/* TOM key off */
1473
KEY_OFF(&ym2413.P_CH[8].SLOT[SLOT1],~2);
1474
1475
/* TOP-CY off */
1476
KEY_OFF(&ym2413.P_CH[8].SLOT[SLOT2],~2);
1477
}
1478
1479
ym2413.rhythm = v&0x3f;
1480
break;
1481
}
1482
}
1483
1484
break;
1485
}
1486
1487
case 0x10:
1488
case 0x20:
1489
{
1490
int block_fnum;
1491
1492
int chan = r&0x0f;
1493
1494
if (chan >= 9)
1495
chan -= 9; /* verified on real YM2413 */
1496
1497
CH = &ym2413.P_CH[chan];
1498
1499
if(r&0x10)
1500
{
1501
/* 10-18: FNUM 0-7 */
1502
block_fnum = (CH->block_fnum&0x0f00) | v;
1503
}
1504
else
1505
{
1506
/* 20-28: suson, keyon, block, FNUM 8 */
1507
block_fnum = ((v&0x0f)<<8) | (CH->block_fnum&0xff);
1508
1509
if(v&0x10)
1510
{
1511
KEY_ON (&CH->SLOT[SLOT1], 1);
1512
KEY_ON (&CH->SLOT[SLOT2], 1);
1513
}
1514
else
1515
{
1516
KEY_OFF(&CH->SLOT[SLOT1],~1);
1517
KEY_OFF(&CH->SLOT[SLOT2],~1);
1518
}
1519
1520
CH->sus = v & 0x20;
1521
}
1522
1523
/* update */
1524
if(CH->block_fnum != block_fnum)
1525
{
1526
UINT8 block;
1527
CH->block_fnum = block_fnum;
1528
1529
/* BLK 2,1,0 bits -> bits 3,2,1 of kcode, FNUM MSB -> kcode LSB */
1530
CH->kcode = (block_fnum&0x0f00)>>8;
1531
1532
CH->ksl_base = ksl_tab[block_fnum>>5];
1533
1534
block_fnum = block_fnum * 2;
1535
block = (block_fnum&0x1c00) >> 10;
1536
CH->fc = ym2413.fn_tab[block_fnum&0x03ff] >> (7-block);
1537
1538
/* refresh Total Level in both SLOTs of this channel */
1539
CH->SLOT[SLOT1].TLL = CH->SLOT[SLOT1].TL + (CH->ksl_base>>CH->SLOT[SLOT1].ksl);
1540
CH->SLOT[SLOT2].TLL = CH->SLOT[SLOT2].TL + (CH->ksl_base>>CH->SLOT[SLOT2].ksl);
1541
1542
/* refresh frequency counter in both SLOTs of this channel */
1543
CALC_FCSLOT(CH,&CH->SLOT[SLOT1]);
1544
CALC_FCSLOT(CH,&CH->SLOT[SLOT2]);
1545
}
1546
1547
break;
1548
}
1549
1550
case 0x30: /* inst 4 MSBs, VOL 4 LSBs */
1551
{
1552
int chan = r&0x0f;
1553
1554
if (chan >= 9)
1555
chan -= 9; /* verified on real YM2413 */
1556
1557
CH = &ym2413.P_CH[chan];
1558
SLOT = &CH->SLOT[SLOT2]; /* carrier */
1559
SLOT->TL = ((v&0x0f)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1560
SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1561
1562
/*check wether we are in rhythm mode and handle instrument/volume register accordingly*/
1563
if ((chan>=6) && (ym2413.rhythm&0x20))
1564
{
1565
/* we're in rhythm mode*/
1566
1567
if (chan>=7) /* only for channel 7 and 8 (channel 6 is handled in usual way)*/
1568
{
1569
SLOT = &CH->SLOT[SLOT1]; /* modulator envelope is HH(chan=7) or TOM(chan=8) */
1570
SLOT->TL = ((v>>4)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1571
SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1572
}
1573
}
1574
else
1575
{
1576
if ((ym2413.instvol_r[chan]&0xf0) != (v&0xf0))
1577
{
1578
ym2413.instvol_r[chan] = v; /* store for later use */
1579
load_instrument(chan, chan * 2, &ym2413.inst_tab[v>>4][0]);
1580
}
1581
}
1582
1583
break;
1584
}
1585
1586
default:
1587
break;
1588
}
1589
}
1590
1591
1592
void YM2413Init(void)
1593
{
1594
init_tables();
1595
1596
/* clear */
1597
memset(&ym2413,0,sizeof(YM2413));
1598
1599
/* init global tables */
1600
OPLL_initalize();
1601
}
1602
1603
void YM2413ResetChip(void)
1604
{
1605
int c,s;
1606
int i;
1607
1608
ym2413.eg_timer = 0;
1609
ym2413.eg_cnt = 0;
1610
1611
ym2413.noise_rng = 1; /* noise shift register */
1612
1613
1614
/* setup instruments table */
1615
for (i=0; i<19; i++)
1616
{
1617
for (c=0; c<8; c++)
1618
{
1619
ym2413.inst_tab[i][c] = table[i][c];
1620
}
1621
}
1622
1623
1624
/* reset with register write */
1625
OPLLWriteReg(0x0f,0); /*test reg*/
1626
for(i = 0x3f ; i >= 0x10 ; i-- ) OPLLWriteReg(i,0x00);
1627
1628
/* reset operator parameters */
1629
for( c = 0 ; c < 9 ; c++ )
1630
{
1631
YM2413_OPLL_CH *CH = &ym2413.P_CH[c];
1632
for(s = 0 ; s < 2 ; s++ )
1633
{
1634
/* wave table */
1635
CH->SLOT[s].wavetable = 0;
1636
CH->SLOT[s].state = EG_OFF;
1637
CH->SLOT[s].volume = MAX_ATT_INDEX;
1638
}
1639
}
1640
}
1641
1642
/* YM2413 I/O interface */
1643
1644
void YM2413Write(unsigned int a, unsigned int v)
1645
{
1646
if( !(a&2) )
1647
{
1648
if( !(a&1) )
1649
{
1650
/* address port */
1651
ym2413.address = v & 0xff;
1652
}
1653
else
1654
{
1655
/* data port */
1656
OPLLWriteReg(ym2413.address,v);
1657
}
1658
}
1659
else
1660
{
1661
/* latched bit (Master System specific) */
1662
ym2413.status = v & 0x01;
1663
}
1664
}
1665
1666
unsigned int YM2413Read(unsigned int a)
1667
{
1668
/* D0=latched bit, D1-D2 need to be zero (Master System specific) */
1669
return 0xF8 | ym2413.status;
1670
}
1671
1672
void YM2413Update(int *buffer, int length)
1673
{
1674
int i, out;
1675
1676
for( i=0; i < length ; i++ )
1677
{
1678
output[0] = 0;
1679
output[1] = 0;
1680
1681
advance_lfo();
1682
1683
/* FM part */
1684
chan_calc(&ym2413.P_CH[0]);
1685
chan_calc(&ym2413.P_CH[1]);
1686
chan_calc(&ym2413.P_CH[2]);
1687
chan_calc(&ym2413.P_CH[3]);
1688
chan_calc(&ym2413.P_CH[4]);
1689
chan_calc(&ym2413.P_CH[5]);
1690
1691
if(!(ym2413.rhythm&0x20))
1692
{
1693
chan_calc(&ym2413.P_CH[6]);
1694
chan_calc(&ym2413.P_CH[7]);
1695
chan_calc(&ym2413.P_CH[8]);
1696
}
1697
else /* Rhythm part */
1698
{
1699
rhythm_calc(&ym2413.P_CH[0], (ym2413.noise_rng>>0)&1 );
1700
}
1701
1702
/* Melody (MO) & Rythm (RO) outputs mixing & amplification (latched bit controls FM output) */
1703
out = (output[0] + (output[1] * 2)) * 2 * ym2413.status;
1704
1705
/* Store to stereo sound buffer */
1706
*buffer++ = out;
1707
*buffer++ = out;
1708
1709
advance();
1710
}
1711
}
1712
1713
unsigned char *YM2413GetContextPtr(void)
1714
{
1715
return (unsigned char *)&ym2413;
1716
}
1717
1718
unsigned int YM2413GetContextSize(void)
1719
{
1720
return sizeof(YM2413);
1721
}
1722
1723