Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
alexbevi
GitHub Repository: alexbevi/BizHawk
Path: blob/master/yabause/src/cs0.c
2 views
1
/* Copyright 2004-2005 Theo Berkau
2
Copyright 2006 Ex-Cyber
3
Copyright 2005 Guillaume Duhamel
4
5
This file is part of Yabause.
6
7
Yabause is free software; you can redistribute it and/or modify
8
it under the terms of the GNU General Public License as published by
9
the Free Software Foundation; either version 2 of the License, or
10
(at your option) any later version.
11
12
Yabause is distributed in the hope that it will be useful,
13
but WITHOUT ANY WARRANTY; without even the implied warranty of
14
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15
GNU General Public License for more details.
16
17
You should have received a copy of the GNU General Public License
18
along with Yabause; if not, write to the Free Software
19
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20
*/
21
22
#include <stdlib.h>
23
#include "cs0.h"
24
#include "error.h"
25
26
cartridge_struct *CartridgeArea;
27
28
//////////////////////////////////////////////////////////////////////////////
29
// Dummy/No Cart Functions
30
//////////////////////////////////////////////////////////////////////////////
31
32
static u8 FASTCALL DummyCs0ReadByte(UNUSED u32 addr)
33
{
34
return 0xFF;
35
}
36
37
//////////////////////////////////////////////////////////////////////////////
38
39
static u16 FASTCALL DummyCs0ReadWord(UNUSED u32 addr)
40
{
41
return 0xFFFF;
42
}
43
44
//////////////////////////////////////////////////////////////////////////////
45
46
static u32 FASTCALL DummyCs0ReadLong(UNUSED u32 addr)
47
{
48
return 0xFFFFFFFF;
49
}
50
51
//////////////////////////////////////////////////////////////////////////////
52
53
static void FASTCALL DummyCs0WriteByte(UNUSED u32 addr, UNUSED u8 val)
54
{
55
}
56
57
//////////////////////////////////////////////////////////////////////////////
58
59
static void FASTCALL DummyCs0WriteWord(UNUSED u32 addr, UNUSED u16 val)
60
{
61
}
62
63
//////////////////////////////////////////////////////////////////////////////
64
65
static void FASTCALL DummyCs0WriteLong(UNUSED u32 addr, UNUSED u32 val)
66
{
67
}
68
69
//////////////////////////////////////////////////////////////////////////////
70
71
static u8 FASTCALL DummyCs1ReadByte(UNUSED u32 addr)
72
{
73
return 0xFF;
74
}
75
76
//////////////////////////////////////////////////////////////////////////////
77
78
static u16 FASTCALL DummyCs1ReadWord(UNUSED u32 addr)
79
{
80
return 0xFFFF;
81
}
82
83
//////////////////////////////////////////////////////////////////////////////
84
85
static u32 FASTCALL DummyCs1ReadLong(UNUSED u32 addr)
86
{
87
return 0xFFFFFFFF;
88
}
89
90
//////////////////////////////////////////////////////////////////////////////
91
92
static void FASTCALL DummyCs1WriteByte(UNUSED u32 addr, UNUSED u8 val)
93
{
94
}
95
96
//////////////////////////////////////////////////////////////////////////////
97
98
static void FASTCALL DummyCs1WriteWord(UNUSED u32 addr, UNUSED u16 val)
99
{
100
}
101
102
//////////////////////////////////////////////////////////////////////////////
103
104
static void FASTCALL DummyCs1WriteLong(UNUSED u32 addr, UNUSED u32 val)
105
{
106
}
107
108
//////////////////////////////////////////////////////////////////////////////
109
110
static u8 FASTCALL DummyCs2ReadByte(UNUSED u32 addr)
111
{
112
return 0xFF;
113
}
114
115
//////////////////////////////////////////////////////////////////////////////
116
117
static u16 FASTCALL DummyCs2ReadWord(UNUSED u32 addr)
118
{
119
return 0xFFFF;
120
}
121
122
//////////////////////////////////////////////////////////////////////////////
123
124
static u32 FASTCALL DummyCs2ReadLong(UNUSED u32 addr)
125
{
126
return 0xFFFFFFFF;
127
}
128
129
//////////////////////////////////////////////////////////////////////////////
130
131
static void FASTCALL DummyCs2WriteByte(UNUSED u32 addr, UNUSED u8 val)
132
{
133
}
134
135
//////////////////////////////////////////////////////////////////////////////
136
137
static void FASTCALL DummyCs2WriteWord(UNUSED u32 addr, UNUSED u16 val)
138
{
139
}
140
141
//////////////////////////////////////////////////////////////////////////////
142
143
static void FASTCALL DummyCs2WriteLong(UNUSED u32 addr, UNUSED u32 val)
144
{
145
}
146
147
//////////////////////////////////////////////////////////////////////////////
148
// Action Replay 4M Plus funcions
149
//////////////////////////////////////////////////////////////////////////////
150
151
typedef enum
152
{
153
FL_READ,
154
FL_SDP,
155
FL_CMD,
156
FL_ID,
157
FL_IDSDP,
158
FL_IDCMD,
159
FL_WRITEBUF,
160
FL_WRITEARRAY
161
} flashstate;
162
163
u8 flreg0 = 0;
164
u8 flreg1 = 0;
165
166
flashstate flstate0;
167
flashstate flstate1;
168
169
u8 flbuf0[128];
170
u8 flbuf1[128];
171
172
//////////////////////////////////////////////////////////////////////////////
173
174
static u8 FASTCALL FlashCs0ReadByte(u32 addr)
175
{
176
flashstate* state;
177
u8* reg;
178
179
if (addr & 1)
180
{
181
state = &flstate1;
182
reg = &flreg1;
183
}
184
else
185
{
186
state = &flstate0;
187
reg = &flreg0;
188
}
189
190
switch (*state)
191
{
192
case FL_ID:
193
case FL_IDSDP:
194
case FL_IDCMD:
195
if (addr & 2) return 0xD5;
196
else return 0x1F;
197
case FL_WRITEARRAY: *reg ^= 0x02;
198
case FL_WRITEBUF: return *reg;
199
case FL_SDP:
200
case FL_CMD: *state = FL_READ;
201
case FL_READ:
202
default: return T2ReadByte(CartridgeArea->rom, addr);
203
}
204
}
205
206
//////////////////////////////////////////////////////////////////////////////
207
208
static u16 FASTCALL FlashCs0ReadWord(u32 addr)
209
{
210
return ((u16)(FlashCs0ReadByte(addr) << 8) | (u16)(FlashCs0ReadByte(addr+1)));
211
}
212
213
//////////////////////////////////////////////////////////////////////////////
214
215
static u32 FASTCALL FlashCs0ReadLong(u32 addr)
216
{
217
return ((u32)FlashCs0ReadWord(addr) << 16) |(u32) FlashCs0ReadWord(addr + 2);
218
}
219
220
//////////////////////////////////////////////////////////////////////////////
221
222
static void FASTCALL FlashCs0WriteByte(u32 addr, u8 val)
223
{
224
flashstate* state;
225
u8* reg;
226
u8* buf;
227
228
if (addr & 1)
229
{
230
state = &flstate1;
231
reg = &flreg1;
232
buf = flbuf1;
233
}
234
else
235
{
236
state = &flstate0;
237
reg = &flreg0;
238
buf = flbuf0;
239
}
240
241
switch (*state)
242
{
243
case FL_READ:
244
if (((addr & 0xfffe) == 0xaaaa) && (val == 0xaa))
245
*state = FL_SDP;
246
return;
247
case FL_WRITEBUF:
248
buf[(addr >> 1) & 0x7f] = val;
249
if (((addr >> 1) & 0x7f) == 0x7f)
250
{
251
int i;
252
int j = addr & 0x1;
253
addr &= 0xffffff00;
254
for (i = 0; i <= 127; i++)
255
{
256
T2WriteByte(CartridgeArea->rom, (addr + i*2 + j), buf[i]);
257
}
258
*state = FL_READ;
259
}
260
return;
261
case FL_SDP:
262
if (((addr & 0xfffe) == 0x5554) && (val == 0x55))
263
*state = FL_CMD;
264
else *state = FL_READ;
265
return;
266
case FL_ID:
267
if (((addr & 0xfffe) == 0xaaaa) && (val == 0xaa))
268
*state = FL_IDSDP;
269
else *state = FL_ID;
270
return;
271
case FL_IDSDP:
272
if (((addr & 0xfffe) == 0x5554) && (val == 0x55))
273
*state = FL_READ;
274
else *state=FL_ID;
275
return;
276
case FL_IDCMD:
277
if (((addr & 0xfffe) == 0xaaaa) && (val == 0xf0))
278
*state = FL_READ;
279
else *state = FL_ID;
280
return;
281
case FL_CMD:
282
if ((addr & 0xfffe) != 0xaaaa)
283
{
284
*state = FL_READ;
285
return;
286
}
287
288
switch (val)
289
{
290
case 0xa0:
291
*state = FL_WRITEBUF;
292
return;
293
case 0x90:
294
*state = FL_ID;
295
return;
296
default:
297
*state = FL_READ;
298
return;
299
}
300
default: break;
301
}
302
}
303
304
//////////////////////////////////////////////////////////////////////////////
305
306
static void FASTCALL FlashCs0WriteWord(u32 addr, u16 val)
307
{
308
FlashCs0WriteByte(addr, (u8)(val >> 8));
309
FlashCs0WriteByte(addr + 1, (u8)(val & 0xff));
310
}
311
312
//////////////////////////////////////////////////////////////////////////////
313
314
static void FASTCALL FlashCs0WriteLong(u32 addr, u32 val)
315
{
316
FlashCs0WriteWord(addr, (u16)(val >> 16));
317
FlashCs0WriteWord(addr + 2, (u16)(val & 0xffff));
318
}
319
320
//////////////////////////////////////////////////////////////////////////////
321
322
static u8 FASTCALL AR4MCs0ReadByte(u32 addr)
323
{
324
addr &= 0x1FFFFFF;
325
326
switch (addr >> 20)
327
{
328
case 0x00:
329
{
330
if ((addr & 0x80000) == 0) // EEPROM
331
return FlashCs0ReadByte(addr);
332
// return biosarea->getByte(addr);
333
// else // Outport
334
// fprintf(stderr, "Commlink Outport Byte read\n");
335
break;
336
}
337
case 0x01:
338
{
339
// if ((addr & 0x80000) == 0) // Commlink Status flag
340
// fprintf(stderr, "Commlink Status Flag read\n");
341
// else // Inport for Commlink
342
// fprintf(stderr, "Commlink Inport Byte read\n");
343
break;
344
}
345
case 0x04:
346
case 0x05:
347
case 0x06:
348
case 0x07: // Dram area
349
return T1ReadByte(CartridgeArea->dram, addr & 0x3FFFFF);
350
default: // The rest doesn't matter
351
break;
352
}
353
354
return 0xFF;
355
}
356
357
//////////////////////////////////////////////////////////////////////////////
358
359
static u16 FASTCALL AR4MCs0ReadWord(u32 addr)
360
{
361
addr &= 0x1FFFFFF;
362
363
switch (addr >> 20)
364
{
365
case 0x00:
366
{
367
if ((addr & 0x80000) == 0) // EEPROM
368
return FlashCs0ReadWord(addr);
369
// else // Outport
370
// fprintf(stderr, "Commlink Outport Word read\n");
371
break;
372
}
373
case 0x01:
374
{
375
// if ((addr & 0x80000) == 0) // Commlink Status flag
376
// fprintf(stderr, "Commlink Status Flag read\n");
377
// else // Inport for Commlink
378
// fprintf(stderr, "Commlink Inport Word read\n");
379
break;
380
}
381
case 0x04:
382
case 0x05:
383
case 0x06:
384
case 0x07: // Ram cart area
385
return T1ReadWord(CartridgeArea->dram, addr & 0x3FFFFF);
386
case 0x12:
387
case 0x1E:
388
if (0x80000)
389
return 0xFFFD;
390
break;
391
case 0x13:
392
case 0x16:
393
case 0x17:
394
case 0x1A:
395
case 0x1B:
396
case 0x1F:
397
return 0xFFFD;
398
default: // The rest doesn't matter
399
break;
400
}
401
402
return 0xFFFF;
403
}
404
405
//////////////////////////////////////////////////////////////////////////////
406
407
static u32 FASTCALL AR4MCs0ReadLong(u32 addr)
408
{
409
addr &= 0x1FFFFFF;
410
411
switch (addr >> 20)
412
{
413
case 0x00:
414
{
415
if ((addr & 0x80000) == 0) // EEPROM
416
return FlashCs0ReadLong(addr);
417
// else // Outport
418
// fprintf(stderr, "Commlink Outport Long read\n");
419
break;
420
}
421
case 0x01:
422
{
423
// if ((addr & 0x80000) == 0) // Commlink Status flag
424
// fprintf(stderr, "Commlink Status Flag read\n");
425
// else // Inport for Commlink
426
// fprintf(stderr, "Commlink Inport Long read\n");
427
break;
428
}
429
case 0x04:
430
case 0x05:
431
case 0x06:
432
case 0x07: // Ram cart area
433
return T1ReadLong(CartridgeArea->dram, addr & 0x3FFFFF);
434
case 0x12:
435
case 0x1E:
436
if (0x80000)
437
return 0xFFFDFFFD;
438
break;
439
case 0x13:
440
case 0x16:
441
case 0x17:
442
case 0x1A:
443
case 0x1B:
444
case 0x1F:
445
return 0xFFFDFFFD;
446
default: // The rest doesn't matter
447
break;
448
}
449
450
return 0xFFFFFFFF;
451
}
452
453
//////////////////////////////////////////////////////////////////////////////
454
455
static void FASTCALL AR4MCs0WriteByte(u32 addr, u8 val)
456
{
457
addr &= 0x1FFFFFF;
458
459
switch (addr >> 20)
460
{
461
case 0x00:
462
{
463
if ((addr & 0x80000) == 0) // EEPROM
464
FlashCs0WriteByte(addr, val);
465
// else // Outport
466
// fprintf(stderr, "Commlink Outport byte write\n");
467
break;
468
}
469
case 0x01:
470
{
471
// if ((addr & 0x80000) == 0) // Commlink Status flag
472
// fprintf(stderr, "Commlink Status Flag write\n");
473
// else // Inport for Commlink
474
// fprintf(stderr, "Commlink Inport Byte write\n");
475
break;
476
}
477
case 0x04:
478
case 0x05:
479
case 0x06:
480
case 0x07: // Ram cart area
481
T1WriteByte(CartridgeArea->dram, addr & 0x3FFFFF, val);
482
break;
483
default: // The rest doesn't matter
484
break;
485
}
486
}
487
488
//////////////////////////////////////////////////////////////////////////////
489
490
static void FASTCALL AR4MCs0WriteWord(u32 addr, u16 val)
491
{
492
addr &= 0x1FFFFFF;
493
494
switch (addr >> 20)
495
{
496
case 0x00:
497
{
498
if ((addr & 0x80000) == 0) // EEPROM
499
FlashCs0WriteWord(addr, val);
500
// else // Outport
501
// fprintf(stderr, "Commlink Outport Word write\n");
502
break;
503
}
504
case 0x01:
505
{
506
// if ((addr & 0x80000) == 0) // Commlink Status flag
507
// fprintf(stderr, "Commlink Status Flag write\n");
508
// else // Inport for Commlink
509
// fprintf(stderr, "Commlink Inport Word write\n");
510
break;
511
}
512
case 0x04:
513
case 0x05:
514
case 0x06:
515
case 0x07: // Ram cart area
516
T1WriteWord(CartridgeArea->dram, addr & 0x3FFFFF, val);
517
break;
518
default: // The rest doesn't matter
519
break;
520
}
521
}
522
523
//////////////////////////////////////////////////////////////////////////////
524
525
static void FASTCALL AR4MCs0WriteLong(u32 addr, u32 val)
526
{
527
addr &= 0x1FFFFFF;
528
529
switch (addr >> 20)
530
{
531
case 0x00:
532
{
533
if ((addr & 0x80000) == 0) // EEPROM
534
FlashCs0WriteLong(addr, val);
535
// else // Outport
536
// fprintf(stderr, "Commlink Outport Long write\n");
537
break;
538
}
539
case 0x01:
540
{
541
// if ((addr & 0x80000) == 0) // Commlink Status flag
542
// fprintf(stderr, "Commlink Status Flag write\n");
543
// else // Inport for Commlink
544
// fprintf(stderr, "Commlink Inport Long write\n");
545
break;
546
}
547
case 0x04:
548
case 0x05:
549
case 0x06:
550
case 0x07: // Ram cart area
551
T1WriteLong(CartridgeArea->dram, addr & 0x3FFFFF, val);
552
break;
553
default: // The rest doesn't matter
554
break;
555
}
556
}
557
558
//////////////////////////////////////////////////////////////////////////////
559
// 8 Mbit Dram
560
//////////////////////////////////////////////////////////////////////////////
561
562
static u8 FASTCALL DRAM8MBITCs0ReadByte(u32 addr)
563
{
564
addr &= 0x1FFFFFF;
565
566
switch (addr >> 20)
567
{
568
case 0x04: // Dram area
569
return T1ReadByte(CartridgeArea->dram, addr & 0x7FFFF);
570
case 0x06: // Dram area
571
return T1ReadByte(CartridgeArea->dram, 0x80000 | (addr & 0x7FFFF));
572
default: // The rest doesn't matter
573
break;
574
}
575
576
return 0xFF;
577
}
578
579
//////////////////////////////////////////////////////////////////////////////
580
581
static u16 FASTCALL DRAM8MBITCs0ReadWord(u32 addr)
582
{
583
addr &= 0x1FFFFFF;
584
585
switch (addr >> 20)
586
{
587
case 0x04: // Dram area
588
return T1ReadWord(CartridgeArea->dram, addr & 0x7FFFF);
589
case 0x06: // Dram area
590
return T1ReadWord(CartridgeArea->dram, 0x80000 | (addr & 0x7FFFF));
591
default: // The rest doesn't matter
592
break;
593
}
594
595
return 0xFFFF;
596
}
597
598
//////////////////////////////////////////////////////////////////////////////
599
600
static u32 FASTCALL DRAM8MBITCs0ReadLong(u32 addr)
601
{
602
addr &= 0x1FFFFFF;
603
604
switch (addr >> 20)
605
{
606
case 0x04: // Dram area
607
return T1ReadLong(CartridgeArea->dram, addr & 0x7FFFF);
608
case 0x06: // Dram area
609
return T1ReadLong(CartridgeArea->dram, 0x80000 | (addr & 0x7FFFF));
610
default: // The rest doesn't matter
611
break;
612
}
613
614
return 0xFFFFFFFF;
615
}
616
617
//////////////////////////////////////////////////////////////////////////////
618
619
static void FASTCALL DRAM8MBITCs0WriteByte(u32 addr, u8 val)
620
{
621
addr &= 0x1FFFFFF;
622
623
switch (addr >> 20)
624
{
625
case 0x04: // Dram area
626
T1WriteByte(CartridgeArea->dram, addr & 0x7FFFF, val);
627
break;
628
case 0x06: // Dram area
629
T1WriteByte(CartridgeArea->dram, 0x80000 | (addr & 0x7FFFF), val);
630
break;
631
default: // The rest doesn't matter
632
break;
633
}
634
}
635
636
//////////////////////////////////////////////////////////////////////////////
637
638
static void FASTCALL DRAM8MBITCs0WriteWord(u32 addr, u16 val)
639
{
640
addr &= 0x1FFFFFF;
641
642
switch (addr >> 20)
643
{
644
case 0x04: // Dram area
645
T1WriteWord(CartridgeArea->dram, addr & 0x7FFFF, val);
646
break;
647
case 0x06: // Dram area
648
T1WriteWord(CartridgeArea->dram, 0x80000 | (addr & 0x7FFFF), val);
649
break;
650
default: // The rest doesn't matter
651
break;
652
}
653
}
654
655
//////////////////////////////////////////////////////////////////////////////
656
657
static void FASTCALL DRAM8MBITCs0WriteLong(u32 addr, u32 val)
658
{
659
addr &= 0x1FFFFFF;
660
661
switch (addr >> 20)
662
{
663
case 0x04: // Dram area
664
T1WriteLong(CartridgeArea->dram, addr & 0x7FFFF, val);
665
break;
666
case 0x06: // Dram area
667
T1WriteLong(CartridgeArea->dram, 0x80000 | (addr & 0x7FFFF), val);
668
break;
669
default: // The rest doesn't matter
670
break;
671
}
672
}
673
674
//////////////////////////////////////////////////////////////////////////////
675
// 32 Mbit Dram
676
//////////////////////////////////////////////////////////////////////////////
677
678
static u8 FASTCALL DRAM32MBITCs0ReadByte(u32 addr)
679
{
680
addr &= 0x1FFFFFF;
681
682
switch (addr >> 20)
683
{
684
case 0x04:
685
case 0x05:
686
case 0x06:
687
case 0x07: // Dram area
688
return T1ReadByte(CartridgeArea->dram, addr & 0x3FFFFF);
689
default: // The rest doesn't matter
690
break;
691
}
692
693
return 0xFF;
694
}
695
696
//////////////////////////////////////////////////////////////////////////////
697
698
static u16 FASTCALL DRAM32MBITCs0ReadWord(u32 addr)
699
{
700
addr &= 0x1FFFFFF;
701
702
switch (addr >> 20)
703
{
704
case 0x04:
705
case 0x05:
706
case 0x06:
707
case 0x07: // Ram cart area
708
return T1ReadWord(CartridgeArea->dram, addr & 0x3FFFFF);
709
default: // The rest doesn't matter
710
break;
711
}
712
713
return 0xFFFF;
714
}
715
716
//////////////////////////////////////////////////////////////////////////////
717
718
static u32 FASTCALL DRAM32MBITCs0ReadLong(u32 addr)
719
{
720
addr &= 0x1FFFFFF;
721
722
switch (addr >> 20)
723
{
724
case 0x04:
725
case 0x05:
726
case 0x06:
727
case 0x07: // Ram cart area
728
return T1ReadLong(CartridgeArea->dram, addr & 0x3FFFFF);
729
default: // The rest doesn't matter
730
break;
731
}
732
733
return 0xFFFFFFFF;
734
}
735
736
//////////////////////////////////////////////////////////////////////////////
737
738
static void FASTCALL DRAM32MBITCs0WriteByte(u32 addr, u8 val)
739
{
740
addr &= 0x1FFFFFF;
741
742
switch (addr >> 20)
743
{
744
case 0x04:
745
case 0x05:
746
case 0x06:
747
case 0x07: // Ram cart area
748
T1WriteByte(CartridgeArea->dram, addr & 0x3FFFFF, val);
749
break;
750
default: // The rest doesn't matter
751
break;
752
}
753
}
754
755
//////////////////////////////////////////////////////////////////////////////
756
757
static void FASTCALL DRAM32MBITCs0WriteWord(u32 addr, u16 val)
758
{
759
addr &= 0x1FFFFFF;
760
761
switch (addr >> 20)
762
{
763
case 0x04:
764
case 0x05:
765
case 0x06:
766
case 0x07: // Ram cart area
767
T1WriteWord(CartridgeArea->dram, addr & 0x3FFFFF, val);
768
break;
769
default: // The rest doesn't matter
770
break;
771
}
772
}
773
774
//////////////////////////////////////////////////////////////////////////////
775
776
static void FASTCALL DRAM32MBITCs0WriteLong(u32 addr, u32 val)
777
{
778
addr &= 0x1FFFFFF;
779
780
switch (addr >> 20)
781
{
782
case 0x04:
783
case 0x05:
784
case 0x06:
785
case 0x07: // Ram cart area
786
T1WriteLong(CartridgeArea->dram, addr & 0x3FFFFF, val);
787
break;
788
default: // The rest doesn't matter
789
break;
790
}
791
}
792
793
//////////////////////////////////////////////////////////////////////////////
794
// 4 Mbit Backup Ram
795
//////////////////////////////////////////////////////////////////////////////
796
797
static u8 FASTCALL BUP4MBITCs1ReadByte(u32 addr)
798
{
799
return T1ReadByte(CartridgeArea->bupram, addr & 0xFFFFF);
800
}
801
802
//////////////////////////////////////////////////////////////////////////////
803
804
static u16 FASTCALL BUP4MBITCs1ReadWord(u32 addr)
805
{
806
return T1ReadWord(CartridgeArea->bupram, addr & 0xFFFFF);
807
}
808
809
//////////////////////////////////////////////////////////////////////////////
810
811
static u32 FASTCALL BUP4MBITCs1ReadLong(u32 addr)
812
{
813
return T1ReadLong(CartridgeArea->bupram, addr & 0xFFFFF);
814
}
815
816
//////////////////////////////////////////////////////////////////////////////
817
818
static void FASTCALL BUP4MBITCs1WriteByte(u32 addr, u8 val)
819
{
820
T1WriteByte(CartridgeArea->bupram, addr & 0xFFFFF, val);
821
}
822
823
//////////////////////////////////////////////////////////////////////////////
824
825
static void FASTCALL BUP4MBITCs1WriteWord(u32 addr, u16 val)
826
{
827
T1WriteWord(CartridgeArea->bupram, addr & 0xFFFFF, val);
828
}
829
830
//////////////////////////////////////////////////////////////////////////////
831
832
static void FASTCALL BUP4MBITCs1WriteLong(u32 addr, u32 val)
833
{
834
T1WriteLong(CartridgeArea->bupram, addr & 0xFFFFF, val);
835
}
836
837
//////////////////////////////////////////////////////////////////////////////
838
// 8 Mbit Backup Ram
839
//////////////////////////////////////////////////////////////////////////////
840
841
static u8 FASTCALL BUP8MBITCs1ReadByte(u32 addr)
842
{
843
return T1ReadByte(CartridgeArea->bupram, addr & 0x1FFFFF);
844
}
845
846
//////////////////////////////////////////////////////////////////////////////
847
848
static u16 FASTCALL BUP8MBITCs1ReadWord(u32 addr)
849
{
850
return T1ReadWord(CartridgeArea->bupram, addr & 0x1FFFFF);
851
}
852
853
//////////////////////////////////////////////////////////////////////////////
854
855
static u32 FASTCALL BUP8MBITCs1ReadLong(u32 addr)
856
{
857
return T1ReadLong(CartridgeArea->bupram, addr & 0x1FFFFF);
858
}
859
860
//////////////////////////////////////////////////////////////////////////////
861
862
static void FASTCALL BUP8MBITCs1WriteByte(u32 addr, u8 val)
863
{
864
T1WriteByte(CartridgeArea->bupram, addr & 0x1FFFFF, val);
865
}
866
867
//////////////////////////////////////////////////////////////////////////////
868
869
static void FASTCALL BUP8MBITCs1WriteWord(u32 addr, u16 val)
870
{
871
T1WriteWord(CartridgeArea->bupram, addr & 0x1FFFFF, val);
872
}
873
874
//////////////////////////////////////////////////////////////////////////////
875
876
static void FASTCALL BUP8MBITCs1WriteLong(u32 addr, u32 val)
877
{
878
T1WriteLong(CartridgeArea->bupram, addr & 0x1FFFFF, val);
879
}
880
881
//////////////////////////////////////////////////////////////////////////////
882
// 16 Mbit Backup Ram
883
//////////////////////////////////////////////////////////////////////////////
884
885
static u8 FASTCALL BUP16MBITCs1ReadByte(u32 addr)
886
{
887
return T1ReadByte(CartridgeArea->bupram, addr & 0x3FFFFF);
888
}
889
890
//////////////////////////////////////////////////////////////////////////////
891
892
static u16 FASTCALL BUP16MBITCs1ReadWord(u32 addr)
893
{
894
return T1ReadWord(CartridgeArea->bupram, addr & 0x3FFFFF);
895
}
896
897
//////////////////////////////////////////////////////////////////////////////
898
899
static u32 FASTCALL BUP16MBITCs1ReadLong(u32 addr)
900
{
901
return T1ReadLong(CartridgeArea->bupram, addr & 0x3FFFFF);
902
}
903
904
//////////////////////////////////////////////////////////////////////////////
905
906
static void FASTCALL BUP16MBITCs1WriteByte(u32 addr, u8 val)
907
{
908
T1WriteByte(CartridgeArea->bupram, addr & 0x3FFFFF, val);
909
}
910
911
//////////////////////////////////////////////////////////////////////////////
912
913
static void FASTCALL BUP16MBITCs1WriteWord(u32 addr, u16 val)
914
{
915
T1WriteWord(CartridgeArea->bupram, addr & 0x3FFFFF, val);
916
}
917
918
//////////////////////////////////////////////////////////////////////////////
919
920
static void FASTCALL BUP16MBITCs1WriteLong(u32 addr, u32 val)
921
{
922
T1WriteLong(CartridgeArea->bupram, addr & 0x3FFFFF, val);
923
}
924
925
//////////////////////////////////////////////////////////////////////////////
926
// 32 Mbit Backup Ram
927
//////////////////////////////////////////////////////////////////////////////
928
929
static u8 FASTCALL BUP32MBITCs1ReadByte(u32 addr)
930
{
931
return T1ReadByte(CartridgeArea->bupram, addr & 0x7FFFFF);
932
}
933
934
//////////////////////////////////////////////////////////////////////////////
935
936
static u16 FASTCALL BUP32MBITCs1ReadWord(u32 addr)
937
{
938
return T1ReadWord(CartridgeArea->bupram, addr & 0x7FFFFF);
939
}
940
941
//////////////////////////////////////////////////////////////////////////////
942
943
static u32 FASTCALL BUP32MBITCs1ReadLong(u32 addr)
944
{
945
return T1ReadLong(CartridgeArea->bupram, addr & 0x7FFFFF);
946
}
947
948
//////////////////////////////////////////////////////////////////////////////
949
950
static void FASTCALL BUP32MBITCs1WriteByte(u32 addr, u8 val)
951
{
952
T1WriteByte(CartridgeArea->bupram, addr & 0x7FFFFF, val);
953
}
954
955
//////////////////////////////////////////////////////////////////////////////
956
957
static void FASTCALL BUP32MBITCs1WriteWord(u32 addr, u16 val)
958
{
959
T1WriteWord(CartridgeArea->bupram, addr & 0x7FFFFF, val);
960
}
961
962
//////////////////////////////////////////////////////////////////////////////
963
964
static void FASTCALL BUP32MBITCs1WriteLong(u32 addr, u32 val)
965
{
966
T1WriteLong(CartridgeArea->bupram, addr & 0x7FFFFF, val);
967
}
968
969
//////////////////////////////////////////////////////////////////////////////
970
// 16 Mbit Rom
971
//////////////////////////////////////////////////////////////////////////////
972
973
static u8 FASTCALL ROM16MBITCs0ReadByte(u32 addr)
974
{
975
return T1ReadByte(CartridgeArea->rom, addr & 0x1FFFFF);
976
}
977
978
//////////////////////////////////////////////////////////////////////////////
979
980
static u16 FASTCALL ROM16MBITCs0ReadWord(u32 addr)
981
{
982
return T1ReadWord(CartridgeArea->rom, addr & 0x1FFFFF);
983
}
984
985
//////////////////////////////////////////////////////////////////////////////
986
987
static u32 FASTCALL ROM16MBITCs0ReadLong(u32 addr)
988
{
989
return T1ReadLong(CartridgeArea->rom, addr & 0x1FFFFF);
990
}
991
992
//////////////////////////////////////////////////////////////////////////////
993
994
static void FASTCALL ROM16MBITCs0WriteByte(u32 addr, u8 val)
995
{
996
T1WriteByte(CartridgeArea->rom, addr & 0x1FFFFF, val);
997
}
998
999
//////////////////////////////////////////////////////////////////////////////
1000
1001
static void FASTCALL ROM16MBITCs0WriteWord(u32 addr, u16 val)
1002
{
1003
T1WriteWord(CartridgeArea->rom, addr & 0x1FFFFF, val);
1004
}
1005
1006
//////////////////////////////////////////////////////////////////////////////
1007
1008
static void FASTCALL ROM16MBITCs0WriteLong(u32 addr, u32 val)
1009
{
1010
T1WriteLong(CartridgeArea->rom, addr & 0x1FFFFF, val);
1011
}
1012
1013
//////////////////////////////////////////////////////////////////////////////
1014
// Sega Saturn Modem(Japanese)
1015
//////////////////////////////////////////////////////////////////////////////
1016
1017
static u8 FASTCALL JapModemCs0ReadByte(u32 addr)
1018
{
1019
if (addr & 0x1)
1020
return 0xA5;
1021
else
1022
return 0xFF;
1023
}
1024
1025
//////////////////////////////////////////////////////////////////////////////
1026
1027
static u16 FASTCALL JapModemCs0ReadWord(UNUSED u32 addr)
1028
{
1029
return 0xFFA5;
1030
}
1031
1032
//////////////////////////////////////////////////////////////////////////////
1033
1034
static u32 FASTCALL JapModemCs0ReadLong(UNUSED u32 addr)
1035
{
1036
return 0xFFA5FFA5;
1037
}
1038
1039
//////////////////////////////////////////////////////////////////////////////
1040
1041
static u8 FASTCALL JapModemCs1ReadByte(UNUSED u32 addr)
1042
{
1043
return 0xA5;
1044
}
1045
1046
//////////////////////////////////////////////////////////////////////////////
1047
1048
static u16 FASTCALL JapModemCs1ReadWord(UNUSED u32 addr)
1049
{
1050
return 0xA5A5;
1051
}
1052
1053
//////////////////////////////////////////////////////////////////////////////
1054
1055
static u32 FASTCALL JapModemCs1ReadLong(UNUSED u32 addr)
1056
{
1057
return 0xA5A5A5A5;
1058
}
1059
1060
//////////////////////////////////////////////////////////////////////////////
1061
// General Cart functions
1062
//////////////////////////////////////////////////////////////////////////////
1063
1064
int CartInit(const char * filename, int type)
1065
{
1066
if ((CartridgeArea = (cartridge_struct *)calloc(1, sizeof(cartridge_struct))) == NULL)
1067
return -1;
1068
1069
CartridgeArea->carttype = type;
1070
CartridgeArea->filename = filename;
1071
1072
switch(type)
1073
{
1074
case CART_PAR: // Action Replay 4M Plus(or equivalent)
1075
{
1076
if ((CartridgeArea->rom = T2MemoryInit(0x40000)) == NULL)
1077
return -1;
1078
1079
if ((CartridgeArea->dram = T1MemoryInit(0x400000)) == NULL)
1080
return -1;
1081
1082
// Use 32 Mbit Dram id
1083
CartridgeArea->cartid = 0x5C;
1084
1085
// Load AR firmware to memory
1086
if (T123Load(CartridgeArea->rom, 0x40000, 2, filename) != 0)
1087
return -1;
1088
flstate0 = FL_READ;
1089
flstate1 = FL_READ;
1090
1091
// Setup Functions
1092
CartridgeArea->Cs0ReadByte = &AR4MCs0ReadByte;
1093
CartridgeArea->Cs0ReadWord = &AR4MCs0ReadWord;
1094
CartridgeArea->Cs0ReadLong = &AR4MCs0ReadLong;
1095
CartridgeArea->Cs0WriteByte = &AR4MCs0WriteByte;
1096
CartridgeArea->Cs0WriteWord = &AR4MCs0WriteWord;
1097
CartridgeArea->Cs0WriteLong = &AR4MCs0WriteLong;
1098
1099
CartridgeArea->Cs1ReadByte = &DummyCs1ReadByte;
1100
CartridgeArea->Cs1ReadWord = &DummyCs1ReadWord;
1101
CartridgeArea->Cs1ReadLong = &DummyCs1ReadLong;
1102
CartridgeArea->Cs1WriteByte = &DummyCs1WriteByte;
1103
CartridgeArea->Cs1WriteWord = &DummyCs1WriteWord;
1104
CartridgeArea->Cs1WriteLong = &DummyCs1WriteLong;
1105
1106
CartridgeArea->Cs2ReadByte = &DummyCs2ReadByte;
1107
CartridgeArea->Cs2ReadWord = &DummyCs2ReadWord;
1108
CartridgeArea->Cs2ReadLong = &DummyCs2ReadLong;
1109
CartridgeArea->Cs2WriteByte = &DummyCs2WriteByte;
1110
CartridgeArea->Cs2WriteWord = &DummyCs2WriteWord;
1111
CartridgeArea->Cs2WriteLong = &DummyCs2WriteLong;
1112
break;
1113
}
1114
case CART_BACKUPRAM4MBIT: // 4 Mbit Backup Ram
1115
{
1116
if ((CartridgeArea->bupram = T1MemoryInit(0x100000)) == NULL)
1117
return -1;
1118
1119
CartridgeArea->cartid = 0x21;
1120
1121
// Load Backup Ram data from file
1122
if (T123Load(CartridgeArea->bupram, 0x100000, 1, filename) != 0)
1123
FormatBackupRam(CartridgeArea->bupram, 0x100000);
1124
1125
// Setup Functions
1126
CartridgeArea->Cs0ReadByte = &DummyCs0ReadByte;
1127
CartridgeArea->Cs0ReadWord = &DummyCs0ReadWord;
1128
CartridgeArea->Cs0ReadLong = &DummyCs0ReadLong;
1129
CartridgeArea->Cs0WriteByte = &DummyCs0WriteByte;
1130
CartridgeArea->Cs0WriteWord = &DummyCs0WriteWord;
1131
CartridgeArea->Cs0WriteLong = &DummyCs0WriteLong;
1132
1133
CartridgeArea->Cs1ReadByte = &BUP4MBITCs1ReadByte;
1134
CartridgeArea->Cs1ReadWord = &BUP4MBITCs1ReadWord;
1135
CartridgeArea->Cs1ReadLong = &BUP4MBITCs1ReadLong;
1136
CartridgeArea->Cs1WriteByte = &BUP4MBITCs1WriteByte;
1137
CartridgeArea->Cs1WriteWord = &BUP4MBITCs1WriteWord;
1138
CartridgeArea->Cs1WriteLong = &BUP4MBITCs1WriteLong;
1139
1140
CartridgeArea->Cs2ReadByte = &DummyCs2ReadByte;
1141
CartridgeArea->Cs2ReadWord = &DummyCs2ReadWord;
1142
CartridgeArea->Cs2ReadLong = &DummyCs2ReadLong;
1143
CartridgeArea->Cs2WriteByte = &DummyCs2WriteByte;
1144
CartridgeArea->Cs2WriteWord = &DummyCs2WriteWord;
1145
CartridgeArea->Cs2WriteLong = &DummyCs2WriteLong;
1146
1147
break;
1148
}
1149
case CART_BACKUPRAM8MBIT: // 8 Mbit Backup Ram
1150
{
1151
if ((CartridgeArea->bupram = T1MemoryInit(0x200000)) == NULL)
1152
return -1;
1153
1154
CartridgeArea->cartid = 0x22;
1155
1156
// Load Backup Ram data from file
1157
if (T123Load(CartridgeArea->bupram, 0x200000, 1, filename) != 0)
1158
FormatBackupRam(CartridgeArea->bupram, 0x200000);
1159
1160
// Setup Functions
1161
CartridgeArea->Cs0ReadByte = &DummyCs0ReadByte;
1162
CartridgeArea->Cs0ReadWord = &DummyCs0ReadWord;
1163
CartridgeArea->Cs0ReadLong = &DummyCs0ReadLong;
1164
CartridgeArea->Cs0WriteByte = &DummyCs0WriteByte;
1165
CartridgeArea->Cs0WriteWord = &DummyCs0WriteWord;
1166
CartridgeArea->Cs0WriteLong = &DummyCs0WriteLong;
1167
1168
CartridgeArea->Cs1ReadByte = &BUP8MBITCs1ReadByte;
1169
CartridgeArea->Cs1ReadWord = &BUP8MBITCs1ReadWord;
1170
CartridgeArea->Cs1ReadLong = &BUP8MBITCs1ReadLong;
1171
CartridgeArea->Cs1WriteByte = &BUP8MBITCs1WriteByte;
1172
CartridgeArea->Cs1WriteWord = &BUP8MBITCs1WriteWord;
1173
CartridgeArea->Cs1WriteLong = &BUP8MBITCs1WriteLong;
1174
1175
CartridgeArea->Cs2ReadByte = &DummyCs2ReadByte;
1176
CartridgeArea->Cs2ReadWord = &DummyCs2ReadWord;
1177
CartridgeArea->Cs2ReadLong = &DummyCs2ReadLong;
1178
CartridgeArea->Cs2WriteByte = &DummyCs2WriteByte;
1179
CartridgeArea->Cs2WriteWord = &DummyCs2WriteWord;
1180
CartridgeArea->Cs2WriteLong = &DummyCs2WriteLong;
1181
1182
break;
1183
}
1184
case CART_BACKUPRAM16MBIT: // 16 Mbit Backup Ram
1185
{
1186
if ((CartridgeArea->bupram = T1MemoryInit(0x400000)) == NULL)
1187
return -1;
1188
1189
CartridgeArea->cartid = 0x23;
1190
1191
// Load Backup Ram data from file
1192
if (T123Load(CartridgeArea->bupram, 0x400000, 1, filename) != 0)
1193
FormatBackupRam(CartridgeArea->bupram, 0x400000);
1194
1195
// Setup Functions
1196
CartridgeArea->Cs0ReadByte = &DummyCs0ReadByte;
1197
CartridgeArea->Cs0ReadWord = &DummyCs0ReadWord;
1198
CartridgeArea->Cs0ReadLong = &DummyCs0ReadLong;
1199
CartridgeArea->Cs0WriteByte = &DummyCs0WriteByte;
1200
CartridgeArea->Cs0WriteWord = &DummyCs0WriteWord;
1201
CartridgeArea->Cs0WriteLong = &DummyCs0WriteLong;
1202
1203
CartridgeArea->Cs1ReadByte = &BUP16MBITCs1ReadByte;
1204
CartridgeArea->Cs1ReadWord = &BUP16MBITCs1ReadWord;
1205
CartridgeArea->Cs1ReadLong = &BUP16MBITCs1ReadLong;
1206
CartridgeArea->Cs1WriteByte = &BUP16MBITCs1WriteByte;
1207
CartridgeArea->Cs1WriteWord = &BUP16MBITCs1WriteWord;
1208
CartridgeArea->Cs1WriteLong = &BUP16MBITCs1WriteLong;
1209
1210
CartridgeArea->Cs2ReadByte = &DummyCs2ReadByte;
1211
CartridgeArea->Cs2ReadWord = &DummyCs2ReadWord;
1212
CartridgeArea->Cs2ReadLong = &DummyCs2ReadLong;
1213
CartridgeArea->Cs2WriteByte = &DummyCs2WriteByte;
1214
CartridgeArea->Cs2WriteWord = &DummyCs2WriteWord;
1215
CartridgeArea->Cs2WriteLong = &DummyCs2WriteLong;
1216
break;
1217
}
1218
case CART_BACKUPRAM32MBIT: // 32 Mbit Backup Ram
1219
{
1220
if ((CartridgeArea->bupram = T1MemoryInit(0x800000)) == NULL)
1221
return -1;
1222
1223
CartridgeArea->cartid = 0x24;
1224
1225
// Load Backup Ram data from file
1226
if (T123Load(CartridgeArea->bupram, 0x800000, 1, filename) != 0)
1227
FormatBackupRam(CartridgeArea->bupram, 0x800000);
1228
1229
// Setup Functions
1230
CartridgeArea->Cs0ReadByte = &DummyCs0ReadByte;
1231
CartridgeArea->Cs0ReadWord = &DummyCs0ReadWord;
1232
CartridgeArea->Cs0ReadLong = &DummyCs0ReadLong;
1233
CartridgeArea->Cs0WriteByte = &DummyCs0WriteByte;
1234
CartridgeArea->Cs0WriteWord = &DummyCs0WriteWord;
1235
CartridgeArea->Cs0WriteLong = &DummyCs0WriteLong;
1236
1237
CartridgeArea->Cs1ReadByte = &BUP32MBITCs1ReadByte;
1238
CartridgeArea->Cs1ReadWord = &BUP32MBITCs1ReadWord;
1239
CartridgeArea->Cs1ReadLong = &BUP32MBITCs1ReadLong;
1240
CartridgeArea->Cs1WriteByte = &BUP32MBITCs1WriteByte;
1241
CartridgeArea->Cs1WriteWord = &BUP32MBITCs1WriteWord;
1242
CartridgeArea->Cs1WriteLong = &BUP32MBITCs1WriteLong;
1243
1244
CartridgeArea->Cs2ReadByte = &DummyCs2ReadByte;
1245
CartridgeArea->Cs2ReadWord = &DummyCs2ReadWord;
1246
CartridgeArea->Cs2ReadLong = &DummyCs2ReadLong;
1247
CartridgeArea->Cs2WriteByte = &DummyCs2WriteByte;
1248
CartridgeArea->Cs2WriteWord = &DummyCs2WriteWord;
1249
CartridgeArea->Cs2WriteLong = &DummyCs2WriteLong;
1250
break;
1251
}
1252
case CART_DRAM8MBIT: // 8 Mbit Dram Cart
1253
{
1254
if ((CartridgeArea->dram = T1MemoryInit(0x100000)) == NULL)
1255
return -1;
1256
1257
CartridgeArea->cartid = 0x5A;
1258
1259
// Setup Functions
1260
CartridgeArea->Cs0ReadByte = &DRAM8MBITCs0ReadByte;
1261
CartridgeArea->Cs0ReadWord = &DRAM8MBITCs0ReadWord;
1262
CartridgeArea->Cs0ReadLong = &DRAM8MBITCs0ReadLong;
1263
CartridgeArea->Cs0WriteByte = &DRAM8MBITCs0WriteByte;
1264
CartridgeArea->Cs0WriteWord = &DRAM8MBITCs0WriteWord;
1265
CartridgeArea->Cs0WriteLong = &DRAM8MBITCs0WriteLong;
1266
1267
CartridgeArea->Cs1ReadByte = &DummyCs1ReadByte;
1268
CartridgeArea->Cs1ReadWord = &DummyCs1ReadWord;
1269
CartridgeArea->Cs1ReadLong = &DummyCs1ReadLong;
1270
CartridgeArea->Cs1WriteByte = &DummyCs1WriteByte;
1271
CartridgeArea->Cs1WriteWord = &DummyCs1WriteWord;
1272
CartridgeArea->Cs1WriteLong = &DummyCs1WriteLong;
1273
1274
CartridgeArea->Cs2ReadByte = &DummyCs2ReadByte;
1275
CartridgeArea->Cs2ReadWord = &DummyCs2ReadWord;
1276
CartridgeArea->Cs2ReadLong = &DummyCs2ReadLong;
1277
CartridgeArea->Cs2WriteByte = &DummyCs2WriteByte;
1278
CartridgeArea->Cs2WriteWord = &DummyCs2WriteWord;
1279
CartridgeArea->Cs2WriteLong = &DummyCs2WriteLong;
1280
break;
1281
}
1282
case CART_DRAM32MBIT: // 32 Mbit Dram Cart
1283
{
1284
if ((CartridgeArea->dram = T1MemoryInit(0x400000)) == NULL)
1285
return -1;
1286
1287
CartridgeArea->cartid = 0x5C;
1288
1289
// Setup Functions
1290
CartridgeArea->Cs0ReadByte = &DRAM32MBITCs0ReadByte;
1291
CartridgeArea->Cs0ReadWord = &DRAM32MBITCs0ReadWord;
1292
CartridgeArea->Cs0ReadLong = &DRAM32MBITCs0ReadLong;
1293
CartridgeArea->Cs0WriteByte = &DRAM32MBITCs0WriteByte;
1294
CartridgeArea->Cs0WriteWord = &DRAM32MBITCs0WriteWord;
1295
CartridgeArea->Cs0WriteLong = &DRAM32MBITCs0WriteLong;
1296
1297
CartridgeArea->Cs1ReadByte = &DummyCs1ReadByte;
1298
CartridgeArea->Cs1ReadWord = &DummyCs1ReadWord;
1299
CartridgeArea->Cs1ReadLong = &DummyCs1ReadLong;
1300
CartridgeArea->Cs1WriteByte = &DummyCs1WriteByte;
1301
CartridgeArea->Cs1WriteWord = &DummyCs1WriteWord;
1302
CartridgeArea->Cs1WriteLong = &DummyCs1WriteLong;
1303
1304
CartridgeArea->Cs2ReadByte = &DummyCs2ReadByte;
1305
CartridgeArea->Cs2ReadWord = &DummyCs2ReadWord;
1306
CartridgeArea->Cs2ReadLong = &DummyCs2ReadLong;
1307
CartridgeArea->Cs2WriteByte = &DummyCs2WriteByte;
1308
CartridgeArea->Cs2WriteWord = &DummyCs2WriteWord;
1309
CartridgeArea->Cs2WriteLong = &DummyCs2WriteLong;
1310
break;
1311
}
1312
case CART_ROM16MBIT: // 16 Mbit Rom Cart
1313
{
1314
if ((CartridgeArea->rom = T1MemoryInit(0x200000)) == NULL)
1315
return -1;
1316
1317
CartridgeArea->cartid = 0xFF; // I have no idea what the real id is
1318
1319
// Load Rom to memory
1320
if (T123Load(CartridgeArea->rom, 0x200000, 1, filename) != 0)
1321
return -1;
1322
1323
// Setup Functions
1324
CartridgeArea->Cs0ReadByte = &ROM16MBITCs0ReadByte;
1325
CartridgeArea->Cs0ReadWord = &ROM16MBITCs0ReadWord;
1326
CartridgeArea->Cs0ReadLong = &ROM16MBITCs0ReadLong;
1327
CartridgeArea->Cs0WriteByte = &ROM16MBITCs0WriteByte;
1328
CartridgeArea->Cs0WriteWord = &ROM16MBITCs0WriteWord;
1329
CartridgeArea->Cs0WriteLong = &ROM16MBITCs0WriteLong;
1330
1331
CartridgeArea->Cs1ReadByte = &DummyCs1ReadByte;
1332
CartridgeArea->Cs1ReadWord = &DummyCs1ReadWord;
1333
CartridgeArea->Cs1ReadLong = &DummyCs1ReadLong;
1334
CartridgeArea->Cs1WriteByte = &DummyCs1WriteByte;
1335
CartridgeArea->Cs1WriteWord = &DummyCs1WriteWord;
1336
CartridgeArea->Cs1WriteLong = &DummyCs1WriteLong;
1337
1338
CartridgeArea->Cs2ReadByte = &DummyCs2ReadByte;
1339
CartridgeArea->Cs2ReadWord = &DummyCs2ReadWord;
1340
CartridgeArea->Cs2ReadLong = &DummyCs2ReadLong;
1341
CartridgeArea->Cs2WriteByte = &DummyCs2WriteByte;
1342
CartridgeArea->Cs2WriteWord = &DummyCs2WriteWord;
1343
CartridgeArea->Cs2WriteLong = &DummyCs2WriteLong;
1344
break;
1345
}
1346
case CART_JAPMODEM: // Sega Saturn Modem(Japanese)
1347
{
1348
CartridgeArea->cartid = 0xFF;
1349
1350
CartridgeArea->Cs0ReadByte = &JapModemCs0ReadByte;
1351
CartridgeArea->Cs0ReadWord = &JapModemCs0ReadWord;
1352
CartridgeArea->Cs0ReadLong = &JapModemCs0ReadLong;
1353
CartridgeArea->Cs0WriteByte = &DummyCs0WriteByte;
1354
CartridgeArea->Cs0WriteWord = &DummyCs0WriteWord;
1355
CartridgeArea->Cs0WriteLong = &DummyCs0WriteLong;
1356
1357
CartridgeArea->Cs1ReadByte = &JapModemCs1ReadByte;
1358
CartridgeArea->Cs1ReadWord = &JapModemCs1ReadWord;
1359
CartridgeArea->Cs1ReadLong = &JapModemCs1ReadLong;
1360
CartridgeArea->Cs1WriteByte = &DummyCs1WriteByte;
1361
CartridgeArea->Cs1WriteWord = &DummyCs1WriteWord;
1362
CartridgeArea->Cs1WriteLong = &DummyCs1WriteLong;
1363
1364
CartridgeArea->Cs2ReadByte = &DummyCs2ReadByte;
1365
CartridgeArea->Cs2ReadWord = &DummyCs2ReadWord;
1366
CartridgeArea->Cs2ReadLong = &DummyCs2ReadLong;
1367
CartridgeArea->Cs2WriteByte = &DummyCs2WriteByte;
1368
CartridgeArea->Cs2WriteWord = &DummyCs2WriteWord;
1369
CartridgeArea->Cs2WriteLong = &DummyCs2WriteLong;
1370
break;
1371
}
1372
default: // No Cart
1373
{
1374
CartridgeArea->cartid = 0xFF;
1375
1376
// Setup Functions
1377
CartridgeArea->Cs0ReadByte = &DummyCs0ReadByte;
1378
CartridgeArea->Cs0ReadWord = &DummyCs0ReadWord;
1379
CartridgeArea->Cs0ReadLong = &DummyCs0ReadLong;
1380
CartridgeArea->Cs0WriteByte = &DummyCs0WriteByte;
1381
CartridgeArea->Cs0WriteWord = &DummyCs0WriteWord;
1382
CartridgeArea->Cs0WriteLong = &DummyCs0WriteLong;
1383
1384
CartridgeArea->Cs1ReadByte = &DummyCs1ReadByte;
1385
CartridgeArea->Cs1ReadWord = &DummyCs1ReadWord;
1386
CartridgeArea->Cs1ReadLong = &DummyCs1ReadLong;
1387
CartridgeArea->Cs1WriteByte = &DummyCs1WriteByte;
1388
CartridgeArea->Cs1WriteWord = &DummyCs1WriteWord;
1389
CartridgeArea->Cs1WriteLong = &DummyCs1WriteLong;
1390
1391
CartridgeArea->Cs2ReadByte = &DummyCs2ReadByte;
1392
CartridgeArea->Cs2ReadWord = &DummyCs2ReadWord;
1393
CartridgeArea->Cs2ReadLong = &DummyCs2ReadLong;
1394
CartridgeArea->Cs2WriteByte = &DummyCs2WriteByte;
1395
CartridgeArea->Cs2WriteWord = &DummyCs2WriteWord;
1396
CartridgeArea->Cs2WriteLong = &DummyCs2WriteLong;
1397
break;
1398
}
1399
}
1400
1401
return 0;
1402
}
1403
1404
//////////////////////////////////////////////////////////////////////////////
1405
1406
void CartDeInit(void)
1407
{
1408
if (CartridgeArea)
1409
{
1410
if (CartridgeArea->carttype == CART_PAR)
1411
{
1412
if (CartridgeArea->rom)
1413
{
1414
if (T123Save(CartridgeArea->rom, 0x40000, 2, CartridgeArea->filename) != 0)
1415
YabSetError(YAB_ERR_FILEWRITE, (void *)CartridgeArea->filename);
1416
T2MemoryDeInit(CartridgeArea->rom);
1417
}
1418
}
1419
else
1420
{
1421
if (CartridgeArea->rom)
1422
T1MemoryDeInit(CartridgeArea->rom);
1423
}
1424
1425
if (CartridgeArea->bupram)
1426
{
1427
u32 size=0;
1428
1429
switch (CartridgeArea->carttype)
1430
{
1431
case CART_BACKUPRAM4MBIT: // 4 Mbit Backup Ram
1432
{
1433
size = 0x100000;
1434
break;
1435
}
1436
case CART_BACKUPRAM8MBIT: // 8 Mbit Backup Ram
1437
{
1438
size = 0x200000;
1439
break;
1440
}
1441
case CART_BACKUPRAM16MBIT: // 16 Mbit Backup Ram
1442
{
1443
size = 0x400000;
1444
break;
1445
}
1446
case CART_BACKUPRAM32MBIT: // 32 Mbit Backup Ram
1447
{
1448
size = 0x800000;
1449
break;
1450
}
1451
}
1452
1453
if (size != 0)
1454
{
1455
if (T123Save(CartridgeArea->bupram, size, 1, CartridgeArea->filename) != 0)
1456
YabSetError(YAB_ERR_FILEWRITE, (void *)CartridgeArea->filename);
1457
1458
T1MemoryDeInit(CartridgeArea->bupram);
1459
}
1460
}
1461
1462
if (CartridgeArea->dram)
1463
T1MemoryDeInit(CartridgeArea->dram);
1464
1465
free(CartridgeArea);
1466
}
1467
CartridgeArea = NULL;
1468
}
1469
1470
//////////////////////////////////////////////////////////////////////////////
1471
1472
int CartSaveState(FILE * fp)
1473
{
1474
int offset;
1475
1476
offset = StateWriteHeader(fp, "CART", 1);
1477
1478
// Write cart type
1479
fwrite((void *)&CartridgeArea->carttype, 4, 1, fp);
1480
1481
// Write the areas associated with the cart type here
1482
switch (CartridgeArea->carttype)
1483
{
1484
case CART_DRAM8MBIT:
1485
fwrite(CartridgeArea->dram, 1, 0x100000, fp);
1486
break;
1487
case CART_DRAM32MBIT:
1488
fwrite(CartridgeArea->dram, 1, 0x400000, fp);
1489
break;
1490
}
1491
1492
return StateFinishHeader(fp, offset);
1493
}
1494
1495
//////////////////////////////////////////////////////////////////////////////
1496
1497
int CartLoadState(FILE * fp, UNUSED int version, int size)
1498
{
1499
int newtype;
1500
1501
// Read cart type
1502
fread((void *)&newtype, 4, 1, fp);
1503
1504
// Check to see if old cart type and new cart type match, if they don't,
1505
// reallocate memory areas
1506
if (CartridgeArea->carttype != newtype)
1507
{
1508
// ...
1509
}
1510
switch (CartridgeArea->carttype)
1511
{
1512
case CART_DRAM8MBIT:
1513
fread(CartridgeArea->dram, 1, 0x100000, fp);
1514
break;
1515
case CART_DRAM32MBIT:
1516
fread(CartridgeArea->dram, 1, 0x400000, fp);
1517
break;
1518
}
1519
1520
// Read the areas associated with the cart type here
1521
1522
return size;
1523
}
1524
1525
//////////////////////////////////////////////////////////////////////////////
1526
1527
1528