Path: blob/main/contrib/llvm-project/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_riscv32.h
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//===-- RegisterContextDarwin_riscv32.h -------------------------*- C++ -*-===//1//2// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.3// See https://llvm.org/LICENSE.txt for license information.4// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception5//6//===----------------------------------------------------------------------===//78#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTDARWIN_RISCV32_H9#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTDARWIN_RISCV32_H1011#include "lldb/Target/RegisterContext.h"12#include "lldb/lldb-private.h"1314class RegisterContextDarwin_riscv32 : public lldb_private::RegisterContext {15public:16RegisterContextDarwin_riscv32(lldb_private::Thread &thread,17uint32_t concrete_frame_idx);1819~RegisterContextDarwin_riscv32() override;2021void InvalidateAllRegisters() override;2223size_t GetRegisterCount() override;2425const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;2627size_t GetRegisterSetCount() override;2829const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;3031bool ReadRegister(const lldb_private::RegisterInfo *reg_info,32lldb_private::RegisterValue &value) override;3334bool WriteRegister(const lldb_private::RegisterInfo *reg_info,35const lldb_private::RegisterValue &value) override;3637bool ReadAllRegisterValues(lldb::WritableDataBufferSP &data_sp) override;3839bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;4041uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,42uint32_t num) override;4344struct GPR {45uint32_t x0;46uint32_t x1;47uint32_t x2;48uint32_t x3;49uint32_t x4;50uint32_t x5;51uint32_t x6;52uint32_t x7;53uint32_t x8;54uint32_t x9;55uint32_t x10;56uint32_t x11;57uint32_t x12;58uint32_t x13;59uint32_t x14;60uint32_t x15;61uint32_t x16;62uint32_t x17;63uint32_t x18;64uint32_t x19;65uint32_t x20;66uint32_t x21;67uint32_t x22;68uint32_t x23;69uint32_t x24;70uint32_t x25;71uint32_t x26;72uint32_t x27;73uint32_t x28;74uint32_t x29;75uint32_t x30;76uint32_t x31;77uint32_t pc;78};7980struct FPU {81uint32_t f0;82uint32_t f1;83uint32_t f2;84uint32_t f3;85uint32_t f4;86uint32_t f5;87uint32_t f6;88uint32_t f7;89uint32_t f8;90uint32_t f9;91uint32_t f10;92uint32_t f11;93uint32_t f12;94uint32_t f13;95uint32_t f14;96uint32_t f15;97uint32_t f16;98uint32_t f17;99uint32_t f18;100uint32_t f19;101uint32_t f20;102uint32_t f21;103uint32_t f22;104uint32_t f23;105uint32_t f24;106uint32_t f25;107uint32_t f26;108uint32_t f27;109uint32_t f28;110uint32_t f29;111uint32_t f30;112uint32_t f31;113uint32_t fcsr;114};115116struct EXC {117uint32_t exception;118uint32_t fsr;119uint32_t far;120};121122struct CSR {123uint32_t csr[1024];124};125126protected:127enum {128GPRRegSet = 2, // RV32_THREAD_STATE129EXCRegSet = 3, // RV32_EXCEPTION_STATE130FPURegSet = 4, // RV_FP32_STATE131CSRRegSet1 = 6, // RV_CSR_STATE1132CSRRegSet2 = 7, // RV_CSR_STATE2133CSRRegSet3 = 8, // RV_CSR_STATE3134CSRRegSet4 = 9, // RV_CSR_STATE4135CSRRegSet = 10 // full 16kbyte CSR reg bank136};137138enum {139GPRWordCount = sizeof(GPR) / sizeof(uint32_t),140FPUWordCount = sizeof(FPU) / sizeof(uint32_t),141EXCWordCount = sizeof(EXC) / sizeof(uint32_t),142CSRWordCount = sizeof(CSR) / sizeof(uint32_t)143};144145enum { Read = 0, Write = 1, kNumErrors = 2 };146147GPR gpr;148FPU fpr;149EXC exc;150CSR csr;151int gpr_errs[2]; // Read/Write errors152int fpr_errs[2]; // Read/Write errors153int exc_errs[2]; // Read/Write errors154int csr_errs[2]; // Read/Write errors155156void InvalidateAllRegisterStates() {157SetError(GPRRegSet, Read, -1);158SetError(FPURegSet, Read, -1);159SetError(EXCRegSet, Read, -1);160SetError(CSRRegSet, Read, -1);161}162163int GetError(int flavor, uint32_t err_idx) const {164if (err_idx < kNumErrors) {165switch (flavor) {166// When getting all errors, just OR all values together to see if167// we got any kind of error.168case GPRRegSet:169return gpr_errs[err_idx];170case FPURegSet:171return fpr_errs[err_idx];172case EXCRegSet:173return exc_errs[err_idx];174case CSRRegSet:175return csr_errs[err_idx];176default:177break;178}179}180return -1;181}182183bool SetError(int flavor, uint32_t err_idx, int err) {184if (err_idx < kNumErrors) {185switch (flavor) {186case GPRRegSet:187gpr_errs[err_idx] = err;188return true;189190case FPURegSet:191fpr_errs[err_idx] = err;192return true;193194case EXCRegSet:195exc_errs[err_idx] = err;196return true;197198case CSRRegSet:199csr_errs[err_idx] = err;200return true;201202default:203break;204}205}206return false;207}208209bool RegisterSetIsCached(int set) const { return GetError(set, Read) == 0; }210211void LogGPR(lldb_private::Log *log, const char *title);212213int ReadGPR(bool force);214215int ReadFPU(bool force);216217int ReadEXC(bool force);218219int ReadCSR(bool force);220221int WriteGPR();222223int WriteFPU();224225int WriteEXC();226227int WriteCSR();228229// Subclasses override these to do the actual reading.230virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) = 0;231232virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpr) = 0;233234virtual int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) = 0;235236virtual int DoReadCSR(lldb::tid_t tid, int flavor, CSR &exc) = 0;237238virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;239240virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpr) = 0;241242virtual int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc) = 0;243244virtual int DoWriteCSR(lldb::tid_t tid, int flavor, const CSR &exc) = 0;245246int ReadRegisterSet(uint32_t set, bool force);247248int WriteRegisterSet(uint32_t set);249250static uint32_t GetRegisterNumber(uint32_t reg_kind, uint32_t reg_num);251252static int GetSetForNativeRegNum(int reg_num);253254static size_t GetRegisterInfosCount();255256static const lldb_private::RegisterInfo *GetRegisterInfos();257};258259#endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTDARWIN_RISCV32_H260261262