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Path: blob/master/Core/MIPS/ARM64/Arm64IRCompBranch.cpp
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// Copyright (c) 2023- PPSSPP Project.12// This program is free software: you can redistribute it and/or modify3// it under the terms of the GNU General Public License as published by4// the Free Software Foundation, version 2.0 or later versions.56// This program is distributed in the hope that it will be useful,7// but WITHOUT ANY WARRANTY; without even the implied warranty of8// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the9// GNU General Public License 2.0 for more details.1011// A copy of the GPL 2.0 should have been included with the program.12// If not, see http://www.gnu.org/licenses/1314// Official git repository and contact information can be found at15// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.1617#include "ppsspp_config.h"18// In other words, PPSSPP_ARCH(ARM64) || DISASM_ALL.19#if PPSSPP_ARCH(ARM64) || (PPSSPP_PLATFORM(WINDOWS) && !defined(__LIBRETRO__))2021#include "Core/MIPS/ARM64/Arm64IRJit.h"22#include "Core/MIPS/ARM64/Arm64IRRegCache.h"2324// This file contains compilation for exits.25//26// All functions should have CONDITIONAL_DISABLE, so we can narrow things down to a file quickly.27// Currently known non working ones should have DISABLE. No flags because that's in IR already.2829// #define CONDITIONAL_DISABLE { CompIR_Generic(inst); return; }30#define CONDITIONAL_DISABLE {}31#define DISABLE { CompIR_Generic(inst); return; }32#define INVALIDOP { _assert_msg_(false, "Invalid IR inst %d", (int)inst.op); CompIR_Generic(inst); return; }3334namespace MIPSComp {3536using namespace Arm64Gen;37using namespace Arm64IRJitConstants;3839void Arm64JitBackend::CompIR_Exit(IRInst inst) {40CONDITIONAL_DISABLE;4142ARM64Reg exitReg = INVALID_REG;43switch (inst.op) {44case IROp::ExitToConst:45FlushAll();46WriteConstExit(inst.constant);47break;4849case IROp::ExitToReg:50exitReg = regs_.MapGPR(inst.src1);51FlushAll();52MOV(SCRATCH1, exitReg);53B(dispatcherPCInSCRATCH1_);54break;5556case IROp::ExitToPC:57FlushAll();58B(dispatcherCheckCoreState_);59break;6061default:62INVALIDOP;63break;64}65}6667void Arm64JitBackend::CompIR_ExitIf(IRInst inst) {68CONDITIONAL_DISABLE;6970ARM64Reg lhs = INVALID_REG;71ARM64Reg rhs = INVALID_REG;72FixupBranch fixup;73switch (inst.op) {74case IROp::ExitToConstIfEq:75case IROp::ExitToConstIfNeq:76if (regs_.IsGPRImm(inst.src1) && regs_.GetGPRImm(inst.src1) == 0) {77lhs = regs_.MapGPR(inst.src2);78FlushAll();7980if (inst.op == IROp::ExitToConstIfEq)81fixup = CBNZ(lhs);82else if (inst.op == IROp::ExitToConstIfNeq)83fixup = CBZ(lhs);84else85_assert_(false);86} else if (regs_.IsGPRImm(inst.src2) && regs_.GetGPRImm(inst.src2) == 0) {87lhs = regs_.MapGPR(inst.src1);88FlushAll();8990if (inst.op == IROp::ExitToConstIfEq)91fixup = CBNZ(lhs);92else if (inst.op == IROp::ExitToConstIfNeq)93fixup = CBZ(lhs);94else95_assert_(false);96} else {97regs_.Map(inst);98lhs = regs_.R(inst.src1);99rhs = regs_.R(inst.src2);100FlushAll();101102CMP(lhs, rhs);103if (inst.op == IROp::ExitToConstIfEq)104fixup = B(CC_NEQ);105else if (inst.op == IROp::ExitToConstIfNeq)106fixup = B(CC_EQ);107else108_assert_(false);109}110111WriteConstExit(inst.constant);112SetJumpTarget(fixup);113break;114115case IROp::ExitToConstIfGtZ:116lhs = regs_.MapGPR(inst.src1);117FlushAll();118CMP(lhs, 0);119fixup = B(CC_LE);120WriteConstExit(inst.constant);121SetJumpTarget(fixup);122break;123124case IROp::ExitToConstIfGeZ:125// In other words, exit if sign bit is 0.126lhs = regs_.MapGPR(inst.src1);127FlushAll();128fixup = TBNZ(lhs, 31);129WriteConstExit(inst.constant);130SetJumpTarget(fixup);131break;132133case IROp::ExitToConstIfLtZ:134// In other words, exit if sign bit is 1.135lhs = regs_.MapGPR(inst.src1);136FlushAll();137fixup = TBZ(lhs, 31);138WriteConstExit(inst.constant);139SetJumpTarget(fixup);140break;141142case IROp::ExitToConstIfLeZ:143lhs = regs_.MapGPR(inst.src1);144FlushAll();145CMP(lhs, 0);146fixup = B(CC_GT);147WriteConstExit(inst.constant);148SetJumpTarget(fixup);149break;150151case IROp::ExitToConstIfFpTrue:152case IROp::ExitToConstIfFpFalse:153// Note: not used.154DISABLE;155break;156157default:158INVALIDOP;159break;160}161}162163} // namespace MIPSComp164165#endif166167168