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Path: blob/master/Core/MIPS/MIPSTables.h
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// Copyright (c) 2012- PPSSPP Project.12// This program is free software: you can redistribute it and/or modify3// it under the terms of the GNU General Public License as published by4// the Free Software Foundation, version 2.0 or later versions.56// This program is distributed in the hope that it will be useful,7// but WITHOUT ANY WARRANTY; without even the implied warranty of8// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the9// GNU General Public License 2.0 for more details.1011// A copy of the GPL 2.0 should have been included with the program.12// If not, see http://www.gnu.org/licenses/1314// Official git repository and contact information can be found at15// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.1617#pragma once1819#include <string>20#include <stdint.h>21#include "Common/CommonTypes.h"22#include "Core/MIPS/MIPS.h"2324#define CONDTYPE_MASK 0x0000000725#define CONDTYPE_EQ 0x0000000126#define CONDTYPE_NE 0x0000000227#define CONDTYPE_LEZ 0x0000000328#define CONDTYPE_GTZ 0x0000000429#define CONDTYPE_LTZ 0x0000000530#define CONDTYPE_GEZ 0x000000063132#define CONDTYPE_FPUFALSE CONDTYPE_EQ33#define CONDTYPE_FPUTRUE CONDTYPE_NE3435// as long as the other flags are checked,36// there is no way to misinterpret these37// as CONDTYPE_X38#define MEMTYPE_MASK 0x00000007ULL39#define MEMTYPE_BYTE 0x00000001ULL40#define MEMTYPE_HWORD 0x00000002ULL41#define MEMTYPE_WORD 0x00000003ULL42#define MEMTYPE_FLOAT 0x00000004ULL43#define MEMTYPE_VQUAD 0x00000005ULL4445#define IS_CONDMOVE 0x00000008ULL46#define DELAYSLOT 0x00000010ULL47#define BAD_INSTRUCTION 0x00000020ULL48#define LIKELY 0x00000040ULL49#define IS_CONDBRANCH 0x00000080ULL50#define IS_JUMP 0x00000100ULL5152#define IN_RS 0x00000200ULL53#define IN_RS_ADDR (0x00000400ULL | IN_RS)54#define IN_RS_SHIFT (0x00000800ULL | IN_RS)55#define IN_RT 0x00001000ULL56#define IN_SA 0x00002000ULL57#define IN_IMM16 0x00004000ULL58#define IN_IMM26 0x00008000ULL59#define IN_MEM 0x00010000ULL60#define IN_OTHER 0x00020000ULL61#define IN_FPUFLAG 0x00040000ULL62#define IN_VFPU_CC 0x00080000ULL6364#define OUT_RT 0x00100000ULL65#define OUT_RD 0x00200000ULL66#define OUT_RA 0x00400000ULL67#define OUT_MEM 0x00800000ULL68#define OUT_OTHER 0x01000000ULL69#define OUT_FPUFLAG 0x02000000ULL70#define OUT_VFPU_CC 0x04000000ULL71#define OUT_EAT_PREFIX 0x08000000ULL7273#define VFPU_NO_PREFIX 0x10000000ULL74#define OUT_VFPU_PREFIX 0x20000000ULL75#define IS_VFPU 0x40000000ULL76#define IS_FPU 0x80000000ULL7778#define IN_FS 0x000100000000ULL79#define IN_FT 0x000200000000ULL80#define IN_LO 0x000400000000ULL81#define IN_HI 0x000800000000ULL8283#define OUT_FD 0x001000000000ULL84#define OUT_FS 0x002000000000ULL85#define OUT_LO 0x004000000000ULL86#define OUT_HI 0x008000000000ULL8788#define IN_VS 0x010000000000ULL89#define IN_VT 0x020000000000ULL90#define OUT_FT 0x040000000000ULL9192#define OUT_VD 0x100000000000ULL9394#define IS_SYSCALL 0x200000000000ULL9596#ifndef CDECL97#define CDECL98#endif99100struct MIPSInfo {101MIPSInfo() {102value = 0;103cycles = 0;104}105106explicit MIPSInfo(u64 v, u16 c = 0) : value(v), cycles(c) {107if (c == 0) {108cycles = 1;109if (v & IS_VFPU)110cycles++;111}112}113114u64 operator & (const u64 &arg) const {115return value & arg;116}117118u64 value : 48;119u64 cycles : 16;120};121122typedef void (CDECL *MIPSDisFunc)(MIPSOpcode opcode, uint32_t pc, char *out, size_t outSize);123typedef void (CDECL *MIPSInterpretFunc)(MIPSOpcode opcode);124125namespace MIPSComp {126class MIPSFrontendInterface;127}128129void MIPSCompileOp(MIPSOpcode op, MIPSComp::MIPSFrontendInterface *jit);130void MIPSDisAsm(MIPSOpcode op, u32 pc, char *out, size_t outSize, bool tabsToSpaces = false);131MIPSInfo MIPSGetInfo(MIPSOpcode op);132void MIPSInterpret(MIPSOpcode op); //only for those rare ones133int MIPSInterpret_RunUntil(u64 globalTicks);134MIPSInterpretFunc MIPSGetInterpretFunc(MIPSOpcode op);135136int MIPSGetInstructionCycleEstimate(MIPSOpcode op);137int MIPSGetMemoryAccessSize(MIPSOpcode op);138const char *MIPSGetName(MIPSOpcode op);139std::string MIPSDisasmAt(u32 compilerPC);140141142