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Path: blob/master/Core/MIPS/RiscV/RiscVAsm.cpp
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// Copyright (c) 2023- PPSSPP Project.12// This program is free software: you can redistribute it and/or modify3// it under the terms of the GNU General Public License as published by4// the Free Software Foundation, version 2.0 or later versions.56// This program is distributed in the hope that it will be useful,7// but WITHOUT ANY WARRANTY; without even the implied warranty of8// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the9// GNU General Public License 2.0 for more details.1011// A copy of the GPL 2.0 should have been included with the program.12// If not, see http://www.gnu.org/licenses/1314// Official git repository and contact information can be found at15// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.1617#include "Common/Log.h"18#include "Core/CoreTiming.h"19#include "Core/MemMap.h"20#include "Core/MIPS/RiscV/RiscVJit.h"21#include "Core/MIPS/RiscV/RiscVRegCache.h"22#include "Core/MIPS/JitCommon/JitCommon.h"23#include "Core/MIPS/JitCommon/JitState.h"24#include "Core/System.h"2526namespace MIPSComp {2728using namespace RiscVGen;29using namespace RiscVJitConstants;3031static const bool enableDebug = false;32static const bool enableDisasm = false;3334static void ShowPC(u32 downcount, void *membase, void *jitbase) {35static int count = 0;36if (currentMIPS) {37ERROR_LOG(Log::JIT, "[%08x] ShowPC Downcount : %08x %d %p %p", currentMIPS->pc, downcount, count, membase, jitbase);38} else {39ERROR_LOG(Log::JIT, "Universe corrupt?");40}41//if (count > 2000)42// exit(0);43count++;44}4546void RiscVJitBackend::GenerateFixedCode(MIPSState *mipsState) {47// This will be used as a writable scratch area, always 32-bit accessible.48const u8 *start = AlignCodePage();49if (DebugProfilerEnabled()) {50ProtectMemoryPages(start, GetMemoryProtectPageSize(), MEM_PROT_READ | MEM_PROT_WRITE);51hooks_.profilerPC = (uint32_t *)GetWritableCodePtr();52*hooks_.profilerPC = 0;53hooks_.profilerStatus = (IRProfilerStatus *)GetWritableCodePtr() + 1;54*hooks_.profilerStatus = IRProfilerStatus::NOT_RUNNING;55SetCodePointer(GetCodePtr() + sizeof(uint32_t) * 2, GetWritableCodePtr() + sizeof(uint32_t) * 2);56}5758const u8 *disasmStart = AlignCodePage();59BeginWrite(GetMemoryProtectPageSize());6061if (jo.useStaticAlloc) {62saveStaticRegisters_ = AlignCode16();63SW(DOWNCOUNTREG, CTXREG, offsetof(MIPSState, downcount));64regs_.EmitSaveStaticRegisters();65RET();6667loadStaticRegisters_ = AlignCode16();68regs_.EmitLoadStaticRegisters();69LW(DOWNCOUNTREG, CTXREG, offsetof(MIPSState, downcount));70RET();71} else {72saveStaticRegisters_ = nullptr;73loadStaticRegisters_ = nullptr;74}7576applyRoundingMode_ = AlignCode16();77{78// Not sure if RISC-V has any flush to zero capability? Leaving it off for now...79LWU(SCRATCH2, CTXREG, offsetof(MIPSState, fcr31));8081// We can skip if the rounding mode is nearest (0) and flush is not set.82// (as restoreRoundingMode cleared it out anyway)83FixupBranch skip = BEQ(SCRATCH2, R_ZERO);8485// MIPS Rounding Mode: RISC-V86// 0: Round nearest 087// 1: Round to zero 188// 2: Round up (ceil) 389// 3: Round down (floor) 290if (cpu_info.RiscV_Zbs) {91BEXTI(SCRATCH1, SCRATCH2, 1);92} else {93ANDI(SCRATCH1, SCRATCH2, 2);94SRLI(SCRATCH1, SCRATCH1, 1);95}96// Swap the lowest bit by the second bit.97XOR(SCRATCH2, SCRATCH2, SCRATCH1);9899FSRM(SCRATCH2);100101SetJumpTarget(skip);102RET();103}104105hooks_.enterDispatcher = (IRNativeFuncNoArg)AlignCode16();106107// Start by saving some regs on the stack. There are 12 GPs and 12 FPs we want.108// Note: we leave R_SP as, well, SP, so it doesn't need to be saved.109_assert_msg_(cpu_info.Mode64bit, "RiscVAsm currently assumes RV64, not RV32 or RV128");110static constexpr RiscVReg regs_to_save[]{ R_RA, X8, X9, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27 };111// TODO: Maybe we shouldn't regalloc all of these? Is it worth it?112static constexpr RiscVReg regs_to_save_fp[]{ F8, F9, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27 };113int saveSize = (XLEN / 8) * (int)(ARRAY_SIZE(regs_to_save) + ARRAY_SIZE(regs_to_save_fp));114if (saveSize & 0xF)115saveSize += 8;116_assert_msg_((saveSize & 0xF) == 0, "Stack must be kept aligned");117int saveOffset = 0;118ADDI(R_SP, R_SP, -saveSize);119for (RiscVReg r : regs_to_save) {120SD(r, R_SP, saveOffset);121saveOffset += XLEN / 8;122}123for (RiscVReg r : regs_to_save_fp) {124FS(64, r, R_SP, saveOffset);125saveOffset += XLEN / 8;126}127_assert_(saveOffset <= saveSize);128129// Fixed registers, these are always kept when in Jit context.130LI(MEMBASEREG, Memory::base, SCRATCH1);131LI(CTXREG, mipsState, SCRATCH1);132LI(JITBASEREG, GetBasePtr() - MIPS_EMUHACK_OPCODE, SCRATCH1);133134LoadStaticRegisters();135WriteDebugProfilerStatus(IRProfilerStatus::IN_JIT);136MovFromPC(SCRATCH1);137WriteDebugPC(SCRATCH1);138outerLoopPCInSCRATCH1_ = GetCodePtr();139MovToPC(SCRATCH1);140outerLoop_ = GetCodePtr();141// Advance can change the downcount (or thread), so must save/restore around it.142SaveStaticRegisters();143RestoreRoundingMode(true);144WriteDebugProfilerStatus(IRProfilerStatus::TIMER_ADVANCE);145QuickCallFunction(&CoreTiming::Advance, X7);146WriteDebugProfilerStatus(IRProfilerStatus::IN_JIT);147ApplyRoundingMode(true);148LoadStaticRegisters();149150dispatcherCheckCoreState_ = GetCodePtr();151LI(SCRATCH1, &coreState, SCRATCH2);152LW(SCRATCH1, SCRATCH1, 0);153FixupBranch badCoreState = BNE(SCRATCH1, R_ZERO);154155// We just checked coreState, so go to advance if downcount is negative.156BLT(DOWNCOUNTREG, R_ZERO, outerLoop_);157FixupBranch skipToRealDispatch = J();158159dispatcherPCInSCRATCH1_ = GetCodePtr();160MovToPC(SCRATCH1);161162hooks_.dispatcher = GetCodePtr();163FixupBranch bail = BLT(DOWNCOUNTREG, R_ZERO);164SetJumpTarget(skipToRealDispatch);165166dispatcherNoCheck_ = GetCodePtr();167168// Debug169if (enableDebug) {170MV(X10, DOWNCOUNTREG);171MV(X11, MEMBASEREG);172MV(X12, JITBASEREG);173QuickCallFunction(&ShowPC, X7);174}175176LWU(SCRATCH1, CTXREG, offsetof(MIPSState, pc));177WriteDebugPC(SCRATCH1);178#ifdef MASKED_PSP_MEMORY179LI(SCRATCH2, 0x3FFFFFFF);180AND(SCRATCH1, SCRATCH1, SCRATCH2);181#endif182ADD(SCRATCH1, SCRATCH1, MEMBASEREG);183hooks_.dispatchFetch = GetCodePtr();184LWU(SCRATCH1, SCRATCH1, 0);185SRLI(SCRATCH2, SCRATCH1, 24);186// We're in other words comparing to the top 8 bits of MIPS_EMUHACK_OPCODE by subtracting.187ADDI(SCRATCH2, SCRATCH2, -(MIPS_EMUHACK_OPCODE >> 24));188FixupBranch needsCompile = BNE(SCRATCH2, R_ZERO);189// No need to mask, JITBASEREG has already accounted for the upper bits.190ADD(SCRATCH1, JITBASEREG, SCRATCH1);191JR(SCRATCH1);192SetJumpTarget(needsCompile);193194// No block found, let's jit. We don't need to save static regs, they're all callee saved.195RestoreRoundingMode(true);196WriteDebugProfilerStatus(IRProfilerStatus::COMPILING);197QuickCallFunction(&MIPSComp::JitAt, X7);198WriteDebugProfilerStatus(IRProfilerStatus::IN_JIT);199ApplyRoundingMode(true);200201// Try again, the block index should be set now.202J(dispatcherNoCheck_);203204SetJumpTarget(bail);205206LI(SCRATCH1, &coreState, SCRATCH2);207LW(SCRATCH1, SCRATCH1, 0);208BEQ(SCRATCH1, R_ZERO, outerLoop_);209210const uint8_t *quitLoop = GetCodePtr();211SetJumpTarget(badCoreState);212213WriteDebugProfilerStatus(IRProfilerStatus::NOT_RUNNING);214SaveStaticRegisters();215RestoreRoundingMode(true);216217_assert_msg_(cpu_info.Mode64bit, "RiscVAsm currently assumes RV64, not RV32 or RV128");218saveOffset = 0;219for (RiscVReg r : regs_to_save) {220LD(r, R_SP, saveOffset);221saveOffset += XLEN / 8;222}223for (RiscVReg r : regs_to_save_fp) {224FL(64, r, R_SP, saveOffset);225saveOffset += XLEN / 8;226}227ADDI(R_SP, R_SP, saveSize);228229RET();230231hooks_.crashHandler = GetCodePtr();232LI(SCRATCH1, &coreState, SCRATCH2);233LI(SCRATCH2, CORE_RUNTIME_ERROR);234SW(SCRATCH2, SCRATCH1, 0);235J(quitLoop);236237// Leave this at the end, add more stuff above.238if (enableDisasm) {239#if PPSSPP_ARCH(RISCV64)240std::vector<std::string> lines = DisassembleRV64(start, GetCodePtr() - start);241for (auto s : lines) {242INFO_LOG(Log::JIT, "%s", s.c_str());243}244#endif245}246247// Let's spare the pre-generated code from unprotect-reprotect.248AlignCodePage();249jitStartOffset_ = (int)(GetCodePtr() - start);250// Don't forget to zap the instruction cache! This must stay at the end of this function.251FlushIcache();252EndWrite();253}254255} // namespace MIPSComp256257258