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Path: blob/master/Core/MIPS/x86/RegCache.h
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// Copyright (c) 2012- PPSSPP Project.12// This program is free software: you can redistribute it and/or modify3// it under the terms of the GNU General Public License as published by4// the Free Software Foundation, version 2.0 or later versions.56// This program is distributed in the hope that it will be useful,7// but WITHOUT ANY WARRANTY; without even the implied warranty of8// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the9// GNU General Public License 2.0 for more details.1011// A copy of the GPL 2.0 should have been included with the program.12// If not, see http://www.gnu.org/licenses/1314// Official git repository and contact information can be found at15// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.1617#pragma once1819#include "ppsspp_config.h"20#include "Common/x64Emitter.h"21#include "Core/MIPS/MIPS.h"2223namespace X64JitConstants {24#if PPSSPP_ARCH(AMD64)25const Gen::X64Reg MEMBASEREG = Gen::RBX;26const Gen::X64Reg CTXREG = Gen::R14;27const Gen::X64Reg JITBASEREG = Gen::R15;28#else29const Gen::X64Reg CTXREG = Gen::EBP;30#endif3132// This must be one of EAX, EBX, ECX, EDX as they have 8-bit subregisters.33const Gen::X64Reg TEMPREG = Gen::EAX;34const int NUM_MIPS_GPRS = 36;3536#if PPSSPP_ARCH(AMD64)37const u32 NUM_X_REGS = 16;38#elif PPSSPP_ARCH(X86)39const u32 NUM_X_REGS = 8;40#endif41}4243namespace MIPSAnalyst {44struct AnalysisResults;45};4647struct MIPSCachedReg {48Gen::OpArg location;49bool away; // value not in source register50bool locked;51};5253struct X64CachedReg {54MIPSGPReg mipsReg;55bool dirty;56bool free;57bool allocLocked;58};5960struct GPRRegCacheState {61MIPSCachedReg regs[X64JitConstants::NUM_MIPS_GPRS];62X64CachedReg xregs[X64JitConstants::NUM_X_REGS];63};6465namespace MIPSComp {66struct JitOptions;67struct JitState;68}6970class GPRRegCache71{72public:73GPRRegCache();74~GPRRegCache() {}75void Start(MIPSState *mipsState, MIPSComp::JitState *js, MIPSComp::JitOptions *jo, MIPSAnalyst::AnalysisResults &stats);7677void DiscardRegContentsIfCached(MIPSGPReg preg);78void DiscardR(MIPSGPReg preg);79void SetEmitter(Gen::XEmitter *emitter) {emit = emitter;}8081void FlushR(Gen::X64Reg reg);82void FlushLockX(Gen::X64Reg reg) {83FlushR(reg);84LockX(reg);85}86void FlushLockX(Gen::X64Reg reg1, Gen::X64Reg reg2) {87FlushR(reg1); FlushR(reg2);88LockX(reg1); LockX(reg2);89}90void Flush();91void FlushBeforeCall();9293// Flushes one register and reuses the register for another one. Dirtyness is implied.94void FlushRemap(MIPSGPReg oldreg, MIPSGPReg newreg);9596int SanityCheck() const;97void KillImmediate(MIPSGPReg preg, bool doLoad, bool makeDirty);9899void MapReg(MIPSGPReg preg, bool doLoad = true, bool makeDirty = true);100void StoreFromRegister(MIPSGPReg preg);101102const Gen::OpArg &R(MIPSGPReg preg) const {return regs[preg].location;}103Gen::X64Reg RX(MIPSGPReg preg) const104{105if (regs[preg].away && regs[preg].location.IsSimpleReg())106return regs[preg].location.GetSimpleReg();107_assert_msg_(false, "Not so simple - %d", preg);108return (Gen::X64Reg)-1;109}110Gen::OpArg GetDefaultLocation(MIPSGPReg reg) const;111112// Register locking.113void Lock(MIPSGPReg p1, MIPSGPReg p2 = MIPS_REG_INVALID, MIPSGPReg p3 = MIPS_REG_INVALID, MIPSGPReg p4 = MIPS_REG_INVALID);114void LockX(int x1, int x2=0xff, int x3=0xff, int x4=0xff);115void UnlockAll();116void UnlockAllX();117118void SetImm(MIPSGPReg preg, u32 immValue);119bool IsImm(MIPSGPReg preg) const;120u32 GetImm(MIPSGPReg preg) const;121122void GetState(GPRRegCacheState &state) const;123void RestoreState(const GPRRegCacheState& state);124125MIPSState *mips_ = nullptr;126127private:128Gen::X64Reg GetFreeXReg();129Gen::X64Reg FindBestToSpill(bool unusedOnly, bool *clobbered);130const Gen::X64Reg *GetAllocationOrder(int &count);131132MIPSCachedReg regs[X64JitConstants::NUM_MIPS_GPRS]{};133X64CachedReg xregs[X64JitConstants::NUM_X_REGS]{};134135Gen::XEmitter *emit = nullptr;136MIPSComp::JitState *js_;137MIPSComp::JitOptions *jo_;138};139140141