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GitHub Repository: hrydgard/ppsspp
 Path: blob/master/Core/MIPS/x86/X64IRCompBranch.cpp
Views: 1401
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// Copyright (c) 2023- PPSSPP Project.

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// This program is free software: you can redistribute it and/or modify

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// it under the terms of the GNU General Public License as published by

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// the Free Software Foundation, version 2.0 or later versions.

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// This program is distributed in the hope that it will be useful,

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// but WITHOUT ANY WARRANTY; without even the implied warranty of

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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

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// GNU General Public License 2.0 for more details.

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// A copy of the GPL 2.0 should have been included with the program.

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// If not, see http://www.gnu.org/licenses/

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// Official git repository and contact information can be found at

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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.

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#include "ppsspp_config.h"

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#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)

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#include "Core/MIPS/x86/X64IRJit.h"

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#include "Core/MIPS/x86/X64IRRegCache.h"

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// This file contains compilation for exits.

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//

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// All functions should have CONDITIONAL_DISABLE, so we can narrow things down to a file quickly.

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// Currently known non working ones should have DISABLE.  No flags because that's in IR already.

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// #define CONDITIONAL_DISABLE { CompIR_Generic(inst); return; }

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#define CONDITIONAL_DISABLE {}

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#define DISABLE { CompIR_Generic(inst); return; }

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#define INVALIDOP { _assert_msg_(false, "Invalid IR inst %d", (int)inst.op); CompIR_Generic(inst); return; }

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namespace MIPSComp {

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using namespace Gen;

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using namespace X64IRJitConstants;

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void X64JitBackend::CompIR_Exit(IRInst inst) {

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	CONDITIONAL_DISABLE;

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	X64Reg exitReg = INVALID_REG;

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	switch (inst.op) {

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	case IROp::ExitToConst:

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		FlushAll();

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		WriteConstExit(inst.constant);

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		break;

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	case IROp::ExitToReg:

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		exitReg = regs_.MapGPR(inst.src1);

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		FlushAll();

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		MOV(32, R(SCRATCH1), R(exitReg));

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		JMP(dispatcherPCInSCRATCH1_, true);

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		break;

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	case IROp::ExitToPC:

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		FlushAll();

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		JMP(dispatcherCheckCoreState_, true);

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		break;

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	default:

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		INVALIDOP;

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		break;

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	}

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}

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void X64JitBackend::CompIR_ExitIf(IRInst inst) {

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	CONDITIONAL_DISABLE;

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	X64Reg lhs = INVALID_REG;

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	X64Reg rhs = INVALID_REG;

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	FixupBranch fixup;

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	switch (inst.op) {

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	case IROp::ExitToConstIfEq:

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	case IROp::ExitToConstIfNeq:

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		regs_.Map(inst);

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		lhs = regs_.RX(inst.src1);

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		rhs = regs_.RX(inst.src2);

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		// This won't change those regs, intentionally.  It might affect flags, though.

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		FlushAll();

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		CMP(32, R(lhs), R(rhs));

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		switch (inst.op) {

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		case IROp::ExitToConstIfEq:

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			fixup = J_CC(CC_NE);

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			break;

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		case IROp::ExitToConstIfNeq:

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			fixup = J_CC(CC_E);

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			break;

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		default:

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			INVALIDOP;

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			break;

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		}

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		WriteConstExit(inst.constant);

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		SetJumpTarget(fixup);

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		break;

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	case IROp::ExitToConstIfGtZ:

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	case IROp::ExitToConstIfGeZ:

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	case IROp::ExitToConstIfLtZ:

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	case IROp::ExitToConstIfLeZ:

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		regs_.Map(inst);

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		lhs = regs_.RX(inst.src1);

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		FlushAll();

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		CMP(32, R(lhs), Imm32(0));

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		switch (inst.op) {

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		case IROp::ExitToConstIfGtZ:

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			fixup = J_CC(CC_LE, lhs);

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			break;

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		case IROp::ExitToConstIfGeZ:

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			fixup = J_CC(CC_L, lhs);

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			break;

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		case IROp::ExitToConstIfLtZ:

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			fixup = J_CC(CC_GE, lhs);

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			break;

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		case IROp::ExitToConstIfLeZ:

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			fixup = J_CC(CC_G, lhs);

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			break;

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		default:

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			INVALIDOP;

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			break;

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		}

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		WriteConstExit(inst.constant);

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		SetJumpTarget(fixup);

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		break;

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	case IROp::ExitToConstIfFpTrue:

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	case IROp::ExitToConstIfFpFalse:

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		// Note: not used.

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		DISABLE;

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		break;

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	default:

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		INVALIDOP;

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		break;

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	}

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}

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} // namespace MIPSComp

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#endif

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